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公开(公告)号：US10822722B2
公开(公告)日：2020-11-03
申请号：US16344045
申请日：2017-07-04
发明人： Hiroshi Fukunaga , Katsushi Akita , Yukio Ishikawa
IPC分类号： C30B29/56 , C30B29/42 , C30B11/00 , H01L29/207 , C30B29/40
摘要： In a gallium arsenide crystal body, an etching pit density of the gallium arsenide crystal body is more than or equal to 10 cm−2 and less than or equal to 10000 cm−2, and an oxygen concentration of the gallium arsenide crystal body is less than 7.0×1015 atoms·cm−3. In a gallium arsenide crystal substrate, an etching pit density of the gallium arsenide crystal substrate is more than or equal to 10 cm−2 and less than or equal to 10000 cm−2, and an oxygen concentration of the gallium arsenide crystal substrate is less than 7.0×1015 atoms·cm−3.
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公开(公告)号：US09608148B2
公开(公告)日：2017-03-28
申请号：US14615217
申请日：2015-02-05
发明人： Takashi Kyono , Kei Fujii , Katsushi Akita
IPC分类号： H01L31/0352 , H01L21/02 , H01L21/66 , H01L31/18 , G01N23/20 , H01L31/0304 , H01L27/146
CPC分类号： H01L31/035236 , G01N23/20 , G01N2223/611 , G01N2223/615 , H01L21/02398 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/02549 , H01L21/0262 , H01L22/12 , H01L27/14694 , H01L31/03046 , H01L31/184 , Y02E10/544
摘要： A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer.
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公开(公告)号：US20140054545A1
公开(公告)日：2014-02-27
申请号：US14115074
申请日：2012-10-29
发明人： Katsushi Akita , Kei Fujii , Takashi Ishizuka , Youichi Nagai
IPC分类号： H01L31/105 , H01L31/0352 , H01L31/18
CPC分类号： H01L31/105 , H01L31/035236 , H01L31/1844 , Y02E10/544 , Y02P70/521
摘要： Provided are a photodetector in which, in a III-V semiconductor having sensitivity in the near-infrared region to the far-infrared region, the carrier concentration can be controlled with high accuracy; an epitaxial wafer serving as a material of the photodetector; and a method for producing the epitaxial wafer. Included are a substrate formed of a III-V compound semiconductor; an absorption layer configured to absorb light; a window layer having a larger bandgap energy than the absorption layer; and a p-n junction positioned at least in the absorption layer, wherein the window layer has a surface having a root-mean-square surface roughness of 10 nm or more and 40 nm or less.
摘要翻译： 提供一种光电检测器，其中在远红外区域的近红外区域具有灵敏度的III-V半导体中，可以高精度地控制载流子浓度; 用作光电检测器的材料的外延晶片; 以及制造外延晶片的方法。 包括由III-V族化合物半导体形成的衬底; 被配置为吸收光的吸收层; 具有比吸收层更大的带隙能量的窗口层; 以及至少位于所述吸收层中的p-n结，其中所述窗口层具有10nm以上且40nm以下的均方根表面粗糙度的表面。
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公开(公告)号：US09929301B2
公开(公告)日：2018-03-27
申请号：US15553213
申请日：2016-01-12
发明人： Takashi Kyono , Suguru Arikata , Katsushi Akita
CPC分类号： H01L31/10 , H01L21/02381 , H01L21/02395 , H01L21/02433 , H01L21/02505 , H01L25/0657 , H01L29/045 , H01L31/0304 , H01L31/035236 , H01L31/105 , H01L33/0079 , H01L33/346 , H01L2924/10253
摘要： A semiconductor stack includes a substrate composed of a III-V group compound semiconductor, a buffer layer that is arranged on the substrate and that is composed of a III-V group compound semiconductor, and an active layer that is arranged on the buffer layer and that includes a layer composed of a III-V group compound semiconductor containing Sb as a group V element. A region of the buffer layer including a main surface of the buffer layer adjacent to the substrate includes a high-concentration region having a high total concentration of Si and C compared with another adjacent region.
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公开(公告)号：US09123843B2
公开(公告)日：2015-09-01
申请号：US14492965
申请日：2014-09-22
发明人： Takashi Kyono , Katsushi Akita , Kaoru Shibata , Koji Nishizuka , Kei Fujii
IPC分类号： H01L21/00 , H01L31/0352 , H01L31/0304 , H01L31/09
CPC分类号： H01L31/035236 , H01L31/02963 , H01L31/0304 , H01L31/18 , Y02E10/544
摘要： A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 μm and less than or equal to 8 μm, the semiconductor device having a dark current density of less than or equal to 1×10−1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of −140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.
摘要翻译： 半导体器件包括其中层叠有多个半导体层的半导体层层叠体，所述半导体层层叠体包括受光层，所述光接收层通过金属 - 有机气相外延法生长，所述光接收层具有 截止波长大于或等于3μm且小于或等于8μm时，当反向偏置电压为60mV时，半导体器件的暗电流密度小于或等于1×10-1A / cm 2 在-140℃的温度下施加。因此，提供了能够接收中红外范围并且具有低暗电流的光的半导体器件。
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6.发明申请LIGHT-EMITTING ELEMENT, EPITAXIAL WAFER, AND METHOD FOR PRODUCING THE EPITAXIAL WAFER 审中-公开发光元件，外延波形和生产外延波形的方法公开(公告)号：US20140367640A1
公开(公告)日：2014-12-18
申请号：US14376388
申请日：2013-01-30
发明人： Kei Fujii , Takashi Ishizuka , Katsushi Akita
CPC分类号： H01L33/06 , B82Y20/00 , C23C16/301 , C30B25/183 , C30B29/40 , C30B29/42 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/02549 , H01L21/0262 , H01L33/0062 , H01L33/30 , H01S5/3422 , H01S2304/04
摘要： Provided are an epitaxial wafer and a light-emitting element having a type-II MQW formed of III-V compound semiconductors and configured to emit light with a sufficiently high intensity. The method includes a step of growing an active layer having a type-II multi-quantum well structure (MQW) on a III-V compound semiconductor substrate, wherein, in the step of forming the type-II multi-quantum well structure, the type-II multi-quantum well structure is formed by metal-organic vapor phase epitaxy using only metal-organic sources such that a number of pairs of the type-II multi-quantum well structure is 25 or more.
摘要翻译： 提供了外延晶片和具有由III-V族化合物半导体形成的II型MQW并被配置为以足够高的强度发光的发光元件。 该方法包括在III-V族化合物半导体衬底上生长具有II型多量子阱结构（MQW）的有源层的步骤，其中在形成II型多量子阱结构的步骤中， II型多量子阱结构通过仅使用金属有机源的金属 - 有机气相外延形成，使得多对II型多量子阱结构为25以上。
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公开(公告)号：US10714640B2
公开(公告)日：2020-07-14
申请号：US16073039
申请日：2017-01-24
IPC分类号： H01L31/0328 , H01L21/00 , H01L31/0352 , H01L31/0304 , H01L31/103 , H01L21/02 , H01L31/101 , H01L31/18 , B82Y20/00
摘要： A semiconductor stacked body includes: a first semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a first conductivity type; a quantum-well light-receiving layer containing a group III-V compound semiconductor; a second semiconductor layer containing a group III-V compound semiconductor; and a third semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a second conductivity type. The first semiconductor layer, the quantum-well light-receiving layer, the second semiconductor layer, and the third semiconductor layer are stacked in this order. The concentration of an impurity that generates a carrier of the second conductivity type is 1×1014 cm−3 or more and 1×1017 cm−3 or less in the second semiconductor layer.
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公开(公告)号：US10326034B2
公开(公告)日：2019-06-18
申请号：US16073006
申请日：2017-01-24
IPC分类号： H01L31/0328 , H01L31/0304 , H01L31/101 , H01L31/0352 , H01L31/105 , H01L27/146 , H01L31/109 , H01L31/18
摘要： A semiconductor layer includes a first semiconductor layer containing a III-V group compound semiconductor and having a first conductivity type, a quantum-well structure containing a III-V group compound semiconductor, a second semiconductor layer containing a III-V group compound semiconductor, a third semiconductor layer containing a III-V group compound semiconductor, and a fourth semiconductor layer containing a III-V group compound semiconductor and having a second conductivity type different from the first conductivity type. The first semiconductor layer, the quantum-well structure, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked in this order. The concentration of an impurity that generates carriers of the second conductivity type is lower in the third semiconductor layer than in the fourth semiconductor layer. The concentration of an impurity that generates majority carriers in the second semiconductor layer is lower in the third semiconductor layer than in the second semiconductor layer.
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公开(公告)号：US09887310B2
公开(公告)日：2018-02-06
申请号：US15114001
申请日：2015-01-19
发明人： Katsushi Akita , Kei Fujii , Takashi Kyono , Koji Nishizuka , Kaoru Shibata
IPC分类号： H01L31/109 , H01L31/02 , H01L21/18 , H01L21/02 , H01L29/06 , C30B29/40 , H01L31/0304 , H01L31/0352 , H01L31/105 , H01L31/0224 , H01L31/0392 , H01L31/18
CPC分类号： H01L31/109 , C30B29/40 , H01L21/02387 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L29/06 , H01L31/022408 , H01L31/03046 , H01L31/035236 , H01L31/0392 , H01L31/105 , H01L31/1844 , Y02E10/544 , Y02P70/521
摘要： A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2−d1)/d1 is −3×10−3 or more and 3×10−3 or less, and (d3−d1)/d1 is −3×10−3 or more and 3×10−3 or less.
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公开(公告)号：US09773932B2
公开(公告)日：2017-09-26
申请号：US15028225
申请日：2014-08-18
发明人： Kei Fujii , Koji Nishizuka , Takashi Kyono , Kaoru Shibata , Katsushi Akita
IPC分类号： H01L21/00 , H01L31/00 , H01L31/0352 , H01L21/02 , H01L31/0304 , H01L31/18
CPC分类号： H01L31/035236 , H01L21/02392 , H01L21/02461 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/0262 , H01L31/03042 , H01L31/03046 , H01L31/1832 , Y02E10/544 , Y02P70/521
摘要： An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×1015 cm−3.
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