公开(公告)号：US12027435B2

公开(公告)日：2024-07-02

申请号：US17818742

申请日：2022-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Shien Chen ,  Kuo-Ching Hsu ,  Wei-Hung Lin ,  Hui-Min Huang ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L23/5384 ,  H01L24/81

摘要： A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.

公开(公告)号：US11990428B2

公开(公告)日：2024-05-21

申请号：US17813069

申请日：2022-07-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hao Chun Liu ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Mirng-Ji Lii

IPC分类号： H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/58

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3185 ,  H01L23/585 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13026 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/35121

摘要： A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.

公开(公告)号：US11854835B2

公开(公告)日：2023-12-26

申请号：US17818747

申请日：2022-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Mirng-Ji Lii ,  Chen-Shien Chen ,  Lung-Kai Mao ,  Ming-Da Cheng ,  Wen-Hsiung Lu

IPC分类号： H01L21/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L23/00

CPC分类号： H01L21/4857 ,  H01L21/486 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5383 ,  H01L24/80 ,  H01L2224/80345 ,  H01L2224/80355

摘要： A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.

公开(公告)号：US20220352094A1

公开(公告)日：2022-11-03

申请号：US17813069

申请日：2022-07-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hao Chun Liu ,  Ching-Wen Hsiao ,  Kuo-Ching Hsu ,  Mirng-Ji Lii

IPC分类号： H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/58

摘要： A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.

公开(公告)号：US11462509B2

公开(公告)日：2022-10-04

申请号：US16918188

申请日：2020-07-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Hao Tsai ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/31 ,  H01L23/42 ,  H01L21/52 ,  H01L21/56

摘要： A package structure is provided. The package structure includes a substrate having a first surface and a second surface opposite the first surface. The substrate includes a cavity extending from the second surface toward the first surface, and thermal vias extending from a bottom surface of the cavity to the first surface. The package structure also includes at least one electronic device formed in the cavity and thermally coupled to the thermal vias. In addition, the package structure includes an insulating layer formed over the second surface and covering the first electronic device. The insulating layer includes a redistribution layer (RDL) structure electrically connected to the electronic device. The package structure also includes an encapsulating material formed in the cavity, extending along sidewalls of the electronic device and between the electronic device and the insulating layer.

公开(公告)号：US20210351139A1

公开(公告)日：2021-11-11

申请号：US17385205

申请日：2021-07-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Hsiang Tseng ,  Yu-Feng Chen ,  Cheng Jen Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Kuo-Ching Hsu ,  Hong-Seng Shue ,  Ming-Hong Cha ,  Chao-Yi Wang ,  Mirng-Ji Lii

IPC分类号： H01L23/58 ,  H01L23/31 ,  H01L23/532 ,  H01L21/02 ,  H01L21/48 ,  H01L23/522

摘要： A semiconductor package includes a first die having a first substrate, an interconnect structure overlying the first substrate and having multiple metal layers with vias connecting the multiple metal layers, a seal ring structure overlying the first substrate and along a periphery of the first substrate, the seal ring structure having multiple metal layers with vias connecting the multiple metal layers, the seal ring structure having a topmost metal layer, the topmost metal layer being the metal layer of the seal ring structure that is furthest from the first substrate, the topmost metal layer of the seal ring structure having an inner metal structure and an outer metal structure, and a polymer layer over the seal ring structure, the polymer layer having an outermost edge that is over and aligned with a top surface of the outer metal structure of the seal ring structure.

公开(公告)号：US20210265165A1

公开(公告)日：2021-08-26

申请号：US17316008

申请日：2021-05-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chang-Jung Hsueh ,  Chen-En Yen ,  Chin Wei Kang ,  Kai Jun Zhan ,  Wei-Hung Lin ,  Cheng Jen Lin ,  Ming-Da Cheng ,  Ching-Hui Chen ,  Mirng-Ji Lii

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/027

摘要： A method includes depositing a plurality of layers on a substrate, patterning a first mask overlying the plurality of layers, and performing a first etching process on the plurality of layers using the first mask. The method also includes forming a polymer material along sidewalls of the first mask and sidewalls of the plurality of layers, and removing the polymer material. The method also includes performing a second etching process on the plurality of layers using the remaining first mask, where after the second etching process terminates a combined sidewall profile of the plurality of layers comprises a first portion and a second portion, and a first angle of the first portion and a second angle of the second portion are different to each other.

公开(公告)号：US20210151550A1

公开(公告)日：2021-05-20

申请号：US17140766

申请日：2021-01-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun Kai Tzeng ,  Cheng Jen Lin ,  Yung-Ching Chao ,  Ming-Da Cheng ,  Mirng-Ji Lii

IPC分类号： H01L49/02 ,  H01L21/311 ,  H01L23/522

摘要： A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.

公开(公告)号：US10559546B2

公开(公告)日：2020-02-11

申请号：US16233218

申请日：2018-12-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Chung-Shi Liu ,  Ming-Da Cheng ,  Mirng-Ji Lii ,  Meng-Tse Chen ,  Wei-Hung Lin

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  B23K35/00 ,  B23K35/02 ,  B23K35/22 ,  B23K35/26 ,  B23K35/36 ,  H01L25/10 ,  H01L21/56 ,  H01L25/00 ,  H01L25/03

摘要： Some embodiments relate to a semiconductor device package, which includes a substrate with a contact pad. A non-solder ball is coupled to the contact pad at a contact pad interface surface. A layer of solder is disposed over an outer surface of the non-solder ball, and has an inner surface and an outer surface which are generally concentric with the outer surface of the non-solder ball. An intermediate layer separates the non-solder ball and the layer of solder. The intermediate layer is distinct in composition from both the non-solder ball and the layer of solder. Sidewalls of the layer of solder are curved or sphere-like and terminate at a planar surface, which is disposed at a maximum height of the layer of solder as measured from the contact pad interface surface.

公开(公告)号：US10276525B2

公开(公告)日：2019-04-30

申请号：US15452674

申请日：2017-03-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ching-Wen Hsiao ,  Chen-Shien Chen ,  Kuo-Ching Hsu ,  Mirng-Ji Lii

IPC分类号： H01L23/00

摘要： A package structure is provided comprising a die, a redistribution layer, at least one integrated passive device (IPD), a plurality of solder balls and a molding compound. The die comprises a substrate and a plurality of conductive pads. The redistribution layer is disposed on the die, wherein the redistribution layer comprises first connection structures and second connection structures. The IPD is disposed on the redistribution layer, wherein the IPD is connected to the first connection structures of the redistribution layer. The plurality of solder balls is disposed on the redistribution layer, wherein the solder balls are disposed and connected to the second connection structures of the redistribution layer. The molding compound is disposed on the redistribution layer, and partially encapsulating the IPD and the plurality of solder balls, wherein top portions of the solder balls and a top surface of the IPD are exposed from the molding compound.