公开(公告)号：US08198140B2

公开(公告)日：2012-06-12

申请号：US12882277

申请日：2010-09-15

申请人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

发明人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/007 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0152 ,  H05K2203/061 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

摘要翻译： 用于安装半导体的布线基板设置有绝缘膜，形成在绝缘膜中的布线以及通过通孔电连接到导线的多个电极垫。 电极焊盘被设置为使其表面暴露于绝缘膜的前表面和后表面，并且电极焊盘的侧表面的至少一部分被埋在绝缘膜中。 绝缘膜通过在相应的两个金属板上形成电极焊盘而形成，然后在相应的金属板上层叠绝缘层和电线以覆盖电极焊盘，并将绝缘层彼此粘合在一起，然后除去 金属板。

公开(公告)号：US20090046441A1

公开(公告)日：2009-02-19

申请号：US12160132

申请日：2006-12-20

申请人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

发明人： Takuo Funaya ,  Hideya Murai ,  Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hirokazu Honda ,  Shinichi Miyazaki

IPC分类号： H05K1/11 ,  H05K1/18

CPC分类号： H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49866 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/19041 ,  H05K1/115 ,  H05K1/117 ,  H05K3/20 ,  H05K3/4614 ,  H05K3/4682 ,  H05K3/4694 ,  H05K2201/0272 ,  H05K2201/0352 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2203/0425 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/05599

摘要： A wiring board for mounting semiconductor device, includes at least a dielectric film 1; wirings formed in the dielectric film 1; a plurality of electrode pads provided at front and back surfaces of the dielectric film with their surfaces exposed and at least portions of lateral sides of them buried into the dielectric film; vias connecting the wirings and the electrode pads. At least one via connecting each other the wirings formed in the dielectric film includes second material different from first material forming the vias connecting the wirings and the electrode pads. The wiring board for mounting semiconductor device, is effective for an increase in terminals and finer pitch of terminal intervals due to an improvement in integration, performance or multi-function of semiconductor devices, can mount semiconductor devices especially on both sides of the board at a high density and high accuracy, and furthermore, is excellent in reliability as well.

摘要翻译： 一种用于安装半导体器件的布线板，至少包括电介质膜1; 电介质膜1中形成的布线; 多个电极焊盘，其设置在电介质膜的前表面和后表面，其表面暴露，并且其侧面的至少一部分埋入电介质膜中; 连接布线和电极垫的通孔。 至少一个彼此连接的通孔形成在电介质膜中的布线包括与形成连接布线和电极焊盘的通孔的第一材料不同的第二材料。 用于安装半导体器件的布线板，由于半导体器件的集成度，性能或多功能性的提高，端子间距的增加和端子间隔的更细的间距是有效的，所以可以在半导体器件的两侧特别地安装半导体器件 高密度和高精度，此外，也具有优异的可靠性。

公开(公告)号：US07816782B2

公开(公告)日：2010-10-19

申请号：US11174526

申请日：2005-07-06

申请人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

发明人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

IPC分类号： H01L23/14 ,  H01L23/12

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/007 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0152 ,  H05K2203/061 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

摘要翻译： 用于安装半导体的布线基板设置有绝缘膜，形成在绝缘膜中的布线以及通过通孔电连接到导线的多个电极垫。 电极焊盘被设置为使其表面暴露于绝缘膜的前表面和后表面，并且电极焊盘的侧表面的至少一部分被埋在绝缘膜中。 绝缘膜通过在相应的两个金属板上形成电极焊盘而形成，然后在相应的金属板上层叠绝缘层和电线以覆盖电极焊盘，并将绝缘层彼此粘合在一起，然后除去 金属板。

公开(公告)号：US20060012048A1

公开(公告)日：2006-01-19

申请号：US11174526

申请日：2005-07-06

申请人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

发明人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

IPC分类号： H01L23/48

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/007 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0152 ,  H05K2203/061 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

摘要翻译： 用于安装半导体的布线基板设置有绝缘膜，形成在绝缘膜中的布线以及通过通孔电连接到导线的多个电极垫。 电极焊盘被设置为使其表面暴露于绝缘膜的前表面和后表面，并且电极焊盘的侧表面的至少一部分被埋在绝缘膜中。 绝缘膜通过在相应的两个金属板上形成电极焊盘而形成，然后在相应的金属板上层叠绝缘层和电线以覆盖电极焊盘，并将绝缘层彼此粘合在一起，然后除去 金属板。

公开(公告)号：US08389414B2

公开(公告)日：2013-03-05

申请号：US13026651

申请日：2011-02-14

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H01L21/311

CPC分类号： H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。

公开(公告)号：US07674989B2

公开(公告)日：2010-03-09

申请号：US11449673

申请日：2006-06-09

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H01R12/04

CPC分类号： H05K1/115 ,  H05K3/0035 ,  H05K3/4069 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2201/09854 ,  H05K2203/1476 ,  Y10T29/49165

摘要： A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

摘要翻译： 一种用于安装具有多个布线层的半导体元件或电子元件的布线板，设置在这些布线层之间的绝缘层，以及设置在绝缘层上并将布线层电连接的通孔。 在该布线板中，通过多个相似形状（圆圈）的部分重叠，获得与布线层平行的平面中的通孔的截面形状。 通过最小化增加密度的障碍物，有效地增加通孔的横截面积，并且通过使通孔的横截面形状成为由通孔形成的形状来防止布线电阻增加，可以在半导体元件中获得稳定的操作 多个类似形状的部分重叠。

公开(公告)号：US20090315190A1

公开(公告)日：2009-12-24

申请号：US12306987

申请日：2007-06-29

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H01L23/538 ,  H05K1/11 ,  H01L21/60 ,  H01L21/31

CPC分类号： H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。

公开(公告)号：US20060283629A1

公开(公告)日：2006-12-21

申请号：US11449673

申请日：2006-06-09

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H05K1/11 ,  H05K3/42

CPC分类号： H05K1/115 ,  H05K3/0035 ,  H05K3/4069 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2201/09854 ,  H05K2203/1476 ,  Y10T29/49165

摘要： A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

摘要翻译： 一种用于安装具有多个布线层的半导体元件或电子元件的布线板，设置在这些布线层之间的绝缘层，以及设置在绝缘层上并将布线层电连接的通孔。 在该布线板中，通过多个相似形状（圆圈）的部分重叠，获得与布线层平行的平面中的通孔的横截面形状。 通过最小化增加密度的障碍物，有效地增加通孔的横截面积，并且通过使通孔的横截面形状成为由通孔形成的形状来防止布线电阻增加，可以在半导体元件中获得稳定的操作 多个类似形状的部分重叠。

公开(公告)号：US07911038B2

公开(公告)日：2011-03-22

申请号：US12306987

申请日：2007-06-29

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H01L23/495

CPC分类号： H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。

公开(公告)号：US07838779B2

公开(公告)日：2010-11-23

申请号：US11452933

申请日：2006-06-15

申请人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

发明人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/0055 ,  H05K3/20 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09563 ,  H05K2201/09863 ,  H05K2203/0796 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

摘要翻译： 在由板状绝缘膜的一面形成的凹部形成有由布线体和蚀刻阻挡层构成的下层布线的布线基板，在基板绝缘膜的另一面形成有上层布线， 绝缘膜，上层布线和下层布线的布线体通过形成在基板绝缘膜上的通孔相互连接。 通孔为桶形，钟形或波纹管状。