Semiconductor module with a number of semiconductor chips and a conductive connection between the semiconductor chips by flexible tapes
    3.
    发明授权
    Semiconductor module with a number of semiconductor chips and a conductive connection between the semiconductor chips by flexible tapes 有权
    具有多个半导体芯片的半导体模块和通过柔性带在半导体芯片之间的导电连接

    公开(公告)号:US06507106B1

    公开(公告)日:2003-01-14

    申请号:US09577060

    申请日:2000-05-22

    申请人: Jürgen Högerl

    发明人: Jürgen Högerl

    IPC分类号: H03L2334

    摘要: A semiconductor module of the type having a number of semiconductor chips disposed on a chip carrier has at least a second subset of the semiconductor chips disposed above a first subset and conductive connections between the semiconductor chips disposed one above another. The improvement includes flexible tapes forming conductive connections between the first subset of semiconductor chips and the second subset of semiconductor chips. Two of the flexible tapes originate from the first subset and lead to the second subset. The two flexible tapes respectively extend from a contact-making side of the first subset around respectively mutually opposite side faces of the first subset to the second subset.

    摘要翻译: 具有设置在芯片载体上的多个半导体芯片的类型的半导体模块具有设置在第一子集之上的半导体芯片的至少第二子集,以及设置在另一个之上的半导体芯片之间的导电连接。 该改进包括在半导体芯片的第一子集与半导体芯片的第二子集之间形成导电连接的柔性带。 两条柔性带来自第一个子集,并导致第二个子集。 两个柔性带分别从第一子集的接触侧分别围绕第一子集的相互相对的侧面延伸到第二子集。

    Semiconductor assembly with a semiconductor module
    5.
    发明授权
    Semiconductor assembly with a semiconductor module 失效
    具有半导体模块的半导体组件

    公开(公告)号:US06774483B2

    公开(公告)日:2004-08-10

    申请号:US10414837

    申请日:2003-04-16

    IPC分类号: H01L2334

    摘要: A semiconductor assembly includes a module holder and a semiconductor module, which has a board substrate with conductor tracks and one or more unpackaged semiconductor chips mounted on the substrate, which are connected to conductor tracks on the substrate by electrical contacts. The substrate has at one edge at least one contact strip with connection contact areas, which are connected to at least some of the conductor tracks. The module holder has a plug-in connection for the electrical connection to other components, at least one mating contact strip for the connection to the contact strip of the at least one semiconductor module and electrical conductors between the contact areas of the at least one semiconductor module and electrical contacts of the plug-in connection. The configuration allows semiconductor modules to be connected to the outside world in an economical way.

    摘要翻译: 半导体组件包括模块保持器和半导体模块,其具有带有导体轨迹的板基板和安装在基板上的一个或多个未封装的半导体芯片,其通过电触点连接到基板上的导体轨道。 衬底在一个边缘处具有至少一个具有连接接触区域的接触片,其连接到至少一些导体轨道。 模块保持器具有用于与其他部件的电连接的插入式连接,用于连接至少一个半导体模块的接触条的至少一个配合接触条和至少一个半导体的接触区之间的电导体 插头连接的模块和电气触点。 该配置允许半导体模块以经济的方式连接到外部世界。

    Semiconductor module having interconnected semiconductor chips disposed one above the other
    7.
    发明授权
    Semiconductor module having interconnected semiconductor chips disposed one above the other 有权
    具有互相连接的半导体芯片的半导体模块一个放置在另一个之上

    公开(公告)号:US06646333B1

    公开(公告)日:2003-11-11

    申请号:US09577065

    申请日:2000-05-22

    申请人: Jürgen Högerl

    发明人: Jürgen Högerl

    IPC分类号: H01L2302

    摘要: A semiconductor module has a plurality of semiconductor chips which are provide on chip carriers in a housing. At least some of the semiconductor chips are disposed one above the other and there are conductive connections between the chip carriers of the semiconductor chips disposed one above the other. The conductive connections are formed by plug-in connections and extend through openings in the chip carriers. The openings may be lined with a conductive layer. In an alternative embodiment intermediate layers are provided between the semiconductor chips disposed one above the other. The intermediate layers have conductive projections which engage in the openings in the chip carriers for forming conductive connections.

    摘要翻译: 半导体模块具有多个半导体芯片,其在壳体中提供芯片载体。 至少一些半导体芯片彼此重叠地布置,并且在半导体芯片的芯片载体之间存在一个彼此上下布置的导电连接。 导电连接由插入式连接形成,并延伸穿过芯片载体中的开口。 开口可以衬有导电层。 在替代实施例中,中间层设置在一个彼此上下布置的半导体芯片之间。 中间层具有接合在芯片载体中的开口中以形成导电连接的导电突起。