公开(公告)号：US08562937B2

公开(公告)日：2013-10-22

申请号：US12158318

申请日：2006-12-19

Applicant: J. Donald Carruthers ,  Xueping Xu ,  Luping Wang

Inventor： J. Donald Carruthers ,  Xueping Xu ,  Luping Wang

IPC: D01F9/127 ,  D01F9/12

CPC classification number: B01J20/205 ,  B01J20/20 ,  B01J21/185 ,  B01J23/74 ,  B01J23/881 ,  B01J23/882 ,  B01J23/883 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  C01B2202/02 ,  C01B2202/08 ,  C01B2202/36 ,  Y02P20/582

Abstract: A method and apparatus for manufacture of carbon nanotubes, in which a substrate is contacted with a hydrocarbonaceous feedstock containing a catalytically effective metal to deposit the feedstock on the substrate, followed by oxidation of the deposited feedstock to remove hydrocarbonaceous and carbonaceous components from the substrate, while retaining the catalytically effective metal thereon, and contacting of the substrate having retained catalytically effective metal thereon with a carbon source material to grow carbon nanotubes on the substrate. The manufacture can be carried out with a petroleum feedstock such as an oil refining atmospheric tower residue, to produce carbon nanotubes in high volume at low cost. Also disclosed is a composite including porous material having single-walled carbon nanotubes in pores thereof.

Abstract translation: 一种用于制造碳纳米管的方法和装置，其中将基底与含有催化有效金属的含烃原料接触以将原料沉积在基底上，随后氧化沉积的原料以从基底中除去含碳和碳质的组分， 同时在其上保留催化有效的金属，并且将具有保留的催化有效金属的基材与碳源材料接触以在基材上生长碳纳米管。 可以用石油原料如炼油大气塔渣进行制造，以低成本大量生产碳纳米管。 还公开了一种复合材料，其包括在其孔中具有单壁碳纳米管的多孔材料。

公开(公告)号：US20080265379A1

公开(公告)日：2008-10-30

申请号：US11994406

申请日：2006-06-27

Applicant: George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

Inventor： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

IPC: H01L29/04

CPC classification number: H01S5/32341 ,  Y10S438/973

Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate (201). In an illustrative implementation, a laser diode is oriented on a GaN substrate (201) wherein the GaN substrate includes a GaN (0001) surface off-cut from the direction predominantly towards either the or the family of directions. For a off-cut substrate, a laser diode cavity (207) may be oriented along the direction parallel to lattice surface steps (202) of the substrate (201) in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For off-cut substrate, the laser diode cavity may be oriented along the direction orthogonal to lattice surface steps (207) of the substrate (201) in order to provide a cleave laser facet that is aligned with the surface lattice steps.

Abstract translation: 一种微电子组件，其中半导体器件结构定向地定位在离轴衬底（201）上。 在说明性实施例中，激光二极管定向在GaN衬底（201）上，其中GaN衬底包括从主要朝向<1120>或<11 00>的方向从<0001>方向偏离的GaN（0001） 家庭方向。 对于<11 20>截割基板，激光二极管空腔（207）可以沿着平行于基板（201）的格子表面台阶（202）的<100°方向取向，以便具有切割的激光刻面 这与表面晶格步骤正交。 对于<11 00>切割衬底，激光二极管腔可以沿着与衬底（201）的晶格表面台阶（207）正交的<100°方向取向，以便提供与 表面晶格步骤。

公开(公告)号：US20080124510A1

公开(公告)日：2008-05-29

申请号：US12026552

申请日：2008-02-05

Applicant: Xueping Xu ,  Robert P. Vaudo

Inventor： Xueping Xu ,  Robert P. Vaudo

IPC: C01B21/06 ,  B32B3/02

CPC classification number: C30B29/406 ,  C30B25/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0254 ,  H01L31/184 ,  H01L33/0075 ,  Y10T428/21 ,  Y10T428/265

Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract translation: 面积为至少2cm 2的大面积单晶III-V族氮化物材料，具有均匀低位错密度，不超过3×10 6个位错/ cm 2 并且包括具有升高的杂质浓度的多个不同区域，其中每个不同区域具有大于50微米的至少一个尺寸。 这样的材料可以通过以下工艺在基底上形成，该方法包括：（i）在凹陷生长条件下在衬底上生长III-V族氮化物材料的第一相，例如在III的生长表面的至少50％上形成凹坑 -V氮化物材料，其中生长表面上的凹坑密度为生长表面的至少10 2个/厘米2，和（ii）生长的第二阶段 在填埋条件下的III-V族氮化物材料。

公开(公告)号：US20070141823A1

公开(公告)日：2007-06-21

申请号：US11606633

申请日：2006-11-30

Applicant: Edward Preble ,  Denis Tsvetkov ,  Andrew Hanser ,  N. Williams ,  Xueping Xu

Inventor： Edward Preble ,  Denis Tsvetkov ,  Andrew Hanser ,  N. Williams ,  Xueping Xu

IPC: H01L21/28

CPC classification number: H01L21/02694 ,  C30B25/02 ,  C30B25/18 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0257 ,  H01L21/02581 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02631 ,  H01L29/04 ,  H01L29/0688 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/30 ,  H01L33/32

Abstract: In a method for making an inclusion-free uniformly semi-insulating GaN crystal, an epitaxial nitride layer is deposited on a substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode, wherein a surface of the nucleation layer is substantially covered with pits and the aspect ratio of the pits is essentially the same. A GaN transitional layer is grown on the nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. After growing the transitional layer, a surface of the transitional layer is substantially pit-free. A bulk GaN layer is grown on the transitional layer by HVPE. After growing the bulk layer, a surface of the bulk layer is smooth and substantially pit-free. The GaN is doped with a transition metal during at least one of the foregoing GaN growth steps.

Abstract translation: 在制造无夹杂物的均匀半绝缘GaN晶体的方法中，在衬底上沉积外延氮化物层。 3D成核GaN层通过HVPE在基本上3D生长模式下在外延氮化物层上生长，其中成核层的表面基本上被凹坑覆盖，并且凹坑的纵横比基本相同。 在将生长模式从基本上3D生长模式改变为基本上2D生长模式的条件下，通过HVPE在成核层上生长GaN过渡层。 在生长过渡层之后，过渡层的表面基本上是无凹坑的。 通过HVPE在过渡层上生长体GaN层。 在生长本体层之后，本体层的表面是光滑的并且基本上无凹坑。 在至少一个上述GaN生长步骤期间，GaN掺杂有过渡金属。

公开(公告)号：US06617772B1

公开(公告)日：2003-09-09

申请号：US09210085

申请日：1998-12-11

Applicant: Roger W. Barton ,  Kollengode S. Narayanan ,  Bob L. Mackey ,  John M. Macaulay ,  George B. Hopple ,  Donald R. Schropp, Jr. ,  Michael J. Nystrom ,  Sudhakar Gopalakrishnan ,  Shiyou Pei ,  Xueping Xu

Inventor： Roger W. Barton ,  Kollengode S. Narayanan ,  Bob L. Mackey ,  John M. Macaulay ,  George B. Hopple ,  Donald R. Schropp, Jr. ,  Michael J. Nystrom ,  Sudhakar Gopalakrishnan ,  Shiyou Pei ,  Xueping Xu

IPC: H01J188

CPC classification number: H01J9/242 ,  H01J29/028 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/863 ,  H01J2329/8635 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/866

Abstract: A flat-panel display contains a pair of plate structure (20 and 22) separated by a spacer (24) having a rough face (54 or 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92). Various techniques are presented for manufacturing the display, including the rough-faced spacer.

Abstract translation: 平板显示器包括由具有粗糙面（54或56）的间隔件（24）分开的一对板结构（20和22）。 当电子撞击间隔物时，间隔物表面的粗糙度导致逸出间隔物的二次电子数量减少，从而减轻间隔物上的正电荷积累。 结果，改善了由显示器产生的图像。 间隔物面部粗糙度可以以各种方式实现，例如凹陷（60,62,64,66,70,74或80）或/和突起（82,84,88和92）。 提出了用于制造显示器的各种技术，包括粗面间隔件。

公开(公告)号：US06447604B1

公开(公告)日：2002-09-10

申请号：US09605195

申请日：2000-06-28

Applicant: Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

Inventor： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

IPC: C30B2514

CPC classification number: C30B25/02 ,  C30B23/002 ,  C30B23/02 ,  C30B25/00 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02636 ,  H01L21/02658 ,  H01L33/32 ,  H01S5/1228 ,  H01S5/1231 ,  H01S5/2095 ,  H01S5/32341

Abstract: A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

Abstract translation: III-V族氮化物同质外延微电子器件结构，其包括III-V族氮化物材料衬底上的III-V族同质外延层，例如独立性。 描述了各种处理技术，包括通过使用III族源材料和氮源材料通过VPE工艺沉积III-V族氮化物同质外延层，在相应的III-V族氮化物材料基板上形成III-V族氮化物同质外延层的方法 在包括约1至约105范围内的V / III比的工艺条件下，氮源材料分压在约1至约103托的范围内，生长温度在约500至约1250摄氏度的范围内 ，并且生长速率在约0.1至约500微米/小时的范围内。 III-V族氮化物同质外延微电子器件结构有用地用于诸如UV LED，高电子迁移率晶体管等的器件应用中。

公开(公告)号：US08212259B2

公开(公告)日：2012-07-03

申请号：US10313561

申请日：2002-12-06

Applicant: Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

Inventor： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

IPC: H01L29/20 ,  H01L21/18

CPC classification number: H01L33/32 ,  C30B23/00 ,  C30B25/00 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262

Abstract: A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 102 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

Abstract translation: III-V族氮化物同质外延微电子器件结构，包括沉积在III-V族氮化物材料衬底上，例如具有独特性质的III-V族氮化物同质外延表层，其具有改善的外延质量。 描述了各种处理技术，包括通过使用III族源材料和氮源材料通过VPE工艺沉积III-V族氮化物同质外延层，在相应的III-V族氮化物材料基板上形成III-V族氮化物同质外延层的方法 在包括约1至约105范围内的V / III比的工艺条件下，氮源材料分压在约1至约103托的范围内，生长温度在约500至约1250摄氏度的范围内 ，并且生长速率在约0.1至约102微米/小时的范围内。 III-V族氮化物同质外延微电子器件结构有用地用于诸如UV LED，高电子迁移率晶体管等的器件应用中。

公开(公告)号：US07897490B2

公开(公告)日：2011-03-01

申请号：US11606783

申请日：2006-11-30

Applicant: Edward A. Preble ,  Lianghong Liu ,  Andrew D. Hanser ,  N. Mark Williams ,  Xueping Xu

Inventor： Edward A. Preble ,  Lianghong Liu ,  Andrew D. Hanser ,  N. Mark Williams ,  Xueping Xu

IPC: H01L21/00

CPC classification number: H01L21/02694 ,  C30B25/02 ,  C30B25/18 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0257 ,  H01L21/02581 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02631 ,  H01L29/04 ,  H01L29/0688 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/30 ,  H01L33/32

Abstract: In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. A bulk GaN layer is grown on the transitional layer by HVPE under the substantially 2D growth mode. A polycrystalline GaN layer is grown on the bulk GaN layer to form a GaN/substrate bi-layer. The GaN/substrate bi-layer may be cooled from the growth temperature to an ambient temperature, wherein GaN material cracks laterally and separates from the substrate, forming a free-standing article.

Abstract translation: 在制造GaN制品的方法中，在单晶衬底上沉积外延氮化物层。 通过HVPE在基本上3D生长模式下在外延氮化物层上生长3D成核GaN层。 在将成长模式从基本上3D生长模式改变为基本上2D生长模式的条件下，通过HVPE在3D成核层上生长GaN过渡层。 在基本上2D生长模式下，通过HVPE在过渡层上生长体GaN层。 在体GaN层上生长多晶GaN层以形成GaN /衬底双层。 GaN /衬底双层可以从生长温度冷却到环境温度，其中GaN材料横向裂开并与衬底分离，形成独立制品。

公开(公告)号：US20100327291A1

公开(公告)日：2010-12-30

申请号：US11606783

申请日：2006-11-30

Applicant: Edward A. Preble ,  Lianghong Liu ,  Andrew D. Hanser ,  N. Mark Williams ,  Xueping Xu

Inventor： Edward A. Preble ,  Lianghong Liu ,  Andrew D. Hanser ,  N. Mark Williams ,  Xueping Xu

IPC: H01L29/20 ,  H01L21/78

CPC classification number: H01L21/02694 ,  C30B25/02 ,  C30B25/18 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0257 ,  H01L21/02581 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02631 ,  H01L29/04 ,  H01L29/0688 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/30 ,  H01L33/32

Abstract: In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. A bulk GaN layer is grown on the transitional layer by HVPE under the substantially 2D growth mode. A polycrystalline GaN layer is grown on the bulk GaN layer to form a GaN/substrate bi-layer. The GaN/substrate bi-layer may be cooled from the growth temperature to an ambient temperature, wherein GaN material cracks laterally and separates from the substrate, forming a free-standing article.

Abstract translation: 在制造GaN制品的方法中，在单晶衬底上沉积外延氮化物层。 通过HVPE在基本上3D生长模式下在外延氮化物层上生长3D成核GaN层。 在将成长模式从基本上3D生长模式改变为基本上2D生长模式的条件下，通过HVPE在3D成核层上生长GaN过渡层。 在基本上2D生长模式下，通过HVPE在过渡层上生长体GaN层。 在体GaN层上生长多晶GaN层以形成GaN /衬底双层。 GaN /衬底双层可以从生长温度冷却到环境温度，其中GaN材料横向裂开并与衬底分离，形成独立制品。

公开(公告)号：US07700203B2

公开(公告)日：2010-04-20

申请号：US12102275

申请日：2008-04-14

Applicant: Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

Inventor： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

IPC: B32B18/00 ,  B32B11/08

CPC classification number: C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominantly toward a direction selected from the group consisting of and directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm−2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

Abstract translation: III-V族氮化物，例如GaN，衬底，其包括从<0001>方向切除的（0001）表面主要朝向选自<10-10>和<11-20>方向的方向切割 在约0.2至约10度的范围内的角度，其中该表面具有通过50×50μm2 AFM扫描测量的RMS粗糙度小于1nm，位错密度小于3E6cm-2。 可以通过在对应的邻位异质外延基底（例如切断蓝宝石）上的基底主体的切削研磨或生长来对对应的原子块或晶片坯料进行切割切片来形成基底。 在制造III-V族氮化物微电子和光电子器件时，该衬底有效地用于同质外延沉积。