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1.发明授权Semiconductor package having proximity communication signal input terminals and manufacturing methods thereof 有权具有接近通信信号输入端子的半导体封装及其制造方法公开(公告)号：US08592982B2
公开(公告)日：2013-11-26
申请号：US13252850
申请日：2011-10-04
CPC分类号： H01L23/48 , H01L23/3114 , H01L23/522 , H01L23/552 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2224/13009 , H01L2224/13099 , H01L2224/16145 , H01L2225/06513 , H01L2225/06531 , H01L2225/06565 , H01L2924/07811 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.
摘要翻译： 半导体封装包括半导体结构。 半导体结构包括多个介电层和嵌入在半导体结构中的多个导电互连。 半导体结构还包括多个邻近通信信号输入端。 多个邻近通信信号输入端中的至少一个包括第一电极和第二电极。 间隔开第一电极和第二电极，以便配置成通过电容耦合提供邻近通信。 第一电极在半导体结构的表面附近露出。
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公开(公告)号：US08368216B2
公开(公告)日：2013-02-05
申请号：US12872644
申请日：2010-08-31
IPC分类号： H01L23/538 , H01L21/60 , H01L23/488
CPC分类号： H01L21/6835 , H01L21/563 , H01L21/568 , H01L23/3114 , H01L24/27 , H01L25/0652 , H01L25/50 , H01L2224/1184 , H01L2224/131 , H01L2224/1329 , H01L2224/16145 , H01L2224/2784 , H01L2224/73104 , H01L2224/73204 , H01L2224/81005 , H01L2224/81801 , H01L2224/8185 , H01L2224/831 , H01L2225/06513 , H01L2924/15311 , H01L2924/15321 , H01L2924/014
摘要： The present invention relates to a semiconductor package having at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface upon which the first metal bumps are disposed and a plurality of first signal coupling pads disposed adjacent to the first active surface. The second layer chip is electrically connected to the first layer chip, and includes a second active surface that faces the first active surface and a plurality of second signal coupling pads. The second signal coupling pads are capacitively coupled to the first signal coupling pads so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps, and the second layer chip, and the first metal bumps are partially exposed.
摘要翻译： 本发明涉及具有至少一个第一层芯片，多个第一金属凸块，至少一个第二层芯片和封装体的半导体封装。 第一层芯片包括设置有第一金属凸块的第一有源表面和与第一有源表面相邻设置的多个第一信号耦合焊盘。 第二层芯片电连接到第一层芯片，并且包括面向第一有源表面的第二有源表面和多个第二信号耦合焊盘。 第二信号耦合焊盘电容耦合到第一信号耦合焊盘，以便提供第一层芯片和第二层芯片之间的接近通信。 封装体封装第一层芯片，第一金属凸块和第二层芯片，并且第一金属凸块部分地露出。
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公开(公告)号：US20110278739A1
公开(公告)日：2011-11-17
申请号：US12777442
申请日：2010-05-11
IPC分类号： H01L23/52
CPC分类号： H01L23/49827 , H01L23/147 , H01L23/48 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L2224/05571 , H01L2224/05573 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/48227 , H01L2225/0651 , H01L2225/06513 , H01L2225/06531 , H01L2225/06541 , H01L2225/06548 , H01L2225/06568 , H01L2225/06572 , H01L2924/00014 , H01L2924/10253 , H01L2924/1815 , H01L2924/19104 , H01L2924/19105 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and an interposer. The first chip is mechanically and electrically connected to the substrate. Some signal pads of the interposer are capacitively coupled to some signal pads of the first chip, so as to provide proximity communication between the first chip and the interposer. Whereby, the capacitively coupled signal pads can be made in fine pitch, and therefore the size of the semiconductor package is reduced and the density of the signal pads is increased.
摘要翻译： 本发明涉及半导体封装。 半导体封装包括衬底，第一芯片和插入器。 第一芯片机械地和电连接到基板。 插入器的一些信号焊盘电容耦合到第一芯片的一些信号焊盘，以便在第一芯片和插入器之间提供接近通信。 由此，电容耦合的信号焊盘可以以细间距制成，因此半导体封装的尺寸减小，信号焊盘的密度增加。
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4.发明授权Apparatus and method for testing non-contact pads of a semiconductor device to be tested 有权用于测试要测试的半导体器件的非接触焊盘的装置和方法公开(公告)号：US08253431B2
公开(公告)日：2012-08-28
申请号：US12784121
申请日：2010-05-20
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I. L. Lin , Ken Juang , Ming-Hsiang Cheng
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I. L. Lin , Ken Juang , Ming-Hsiang Cheng
CPC分类号： G01R1/0483 , G01R1/0466 , G01R31/2886
摘要： The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening. Whereby, the non-contact pads of the semiconductor device to be tested face but not in physically contact with the testing pads of the active chip, so as to test the proximity communication between the non-contact pads of the semiconductor device and the testing pads of the active chip.
摘要翻译： 本发明涉及一种用于测试待测半导体器件的非接触焊盘的装置和方法。 该装置包括绝缘体，至少一个测试模块和多个探针。 绝缘体包括容纳腔，下开口和至少一个侧开口。 侧开口与容纳腔和下开口连通。 测试模块设置在侧开口中，每个测试模块包括电路板和有源芯片。 有源芯片设置在电路板上并与之电连接。 有源芯片具有暴露于容纳腔的多个测试焊盘。 探针设置在下开口中。 因此，要测试的半导体器件的非接触焊盘面对但不与有源芯片的测试焊盘物理接触，以便测试半导体器件的非接触焊盘与测试焊盘之间的接近连接 的有源芯片。
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5.发明申请Apparatus and Method for Testing Non-Contact Pads of a Semiconductor Device to be Tested 有权用于测试要测试的半导体器件的非接触焊盘的装置和方法公开(公告)号：US20110291690A1
公开(公告)日：2011-12-01
申请号：US12784121
申请日：2010-05-20
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I.L. Lin , Ken Juang , Ming-Hsiang Cheng
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I.L. Lin , Ken Juang , Ming-Hsiang Cheng
IPC分类号： G01R31/26
CPC分类号： G01R1/0483 , G01R1/0466 , G01R31/2886
摘要： The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on to and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening. Whereby, the non-contact pads of the semiconductor device to be tested face but not in physically contact with the testing pads of the active chip, so as to test the proximity communication between the non-contact pads of the semiconductor device and the testing pads of the active chip.
摘要翻译： 本发明涉及一种用于测试待测半导体器件的非接触焊盘的装置和方法。 该装置包括绝缘体，至少一个测试模块和多个探针。 绝缘体包括容纳腔，下开口和至少一个侧开口。 侧开口与容纳腔和下开口连通。 测试模块设置在侧开口中，每个测试模块包括电路板和有源芯片。 有源芯片设置在电路板上并与电路板电连接。 有源芯片具有暴露于容纳腔的多个测试焊盘。 探针设置在下开口中。 因此，要测试的半导体器件的非接触焊盘面对但不与有源芯片的测试焊盘物理接触，以便测试半导体器件的非接触焊盘与测试焊盘之间的接近连接 的有源芯片。
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公开(公告)号：US20110309516A1
公开(公告)日：2011-12-22
申请号：US12819796
申请日：2010-06-21
IPC分类号： H01L23/538 , H01L21/768 , H01L21/60
CPC分类号： H01L23/48 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2225/06513 , H01L2225/06531 , H01L2225/06541 , H01L2924/00014 , H01L2924/1815 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of first signal coupling pads. The first non-top metal layer is disposed adjacent to and spaced apart from the first active surface by a second distance. The first signal coupling pads are disposed on the first non-top metal layer. The second chip is electrically connected to the first chip. The second chip comprises a second active surface, at least one second non-top metal layer and a plurality of third signal coupling pads. The second active surface faces the first active surface of the first chip. The second non-top metal layer is disposed adjacent to and spaced apart from the second active surface by a fourth distance. The third signal coupling pads are disposed on the second non-top metal layer and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip. Whereby, the gap variation between the first signal coupling pads of the first chip and the third signal coupling pads of the second chip is under stringent control of the second distance and the fourth distance. Therefore, the mass-production yield of the semiconductor package is increased.
摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括第一芯片和第二芯片。 第一芯片包括第一有源表面，至少一个第一非顶部金属层和多个第一信号耦合焊盘。 第一非顶部金属层设置成与第一有源表面相邻并间隔开第二距离。 第一信号耦合焊盘设置在第一非顶部金属层上。 第二芯片电连接到第一芯片。 第二芯片包括第二有源表面，至少一个第二非顶部金属层和多个第三信号耦合焊盘。 第二活性表面面向第一芯片的第一有效表面。 第二非顶部金属层被布置成与第二有源表面相邻并且与第二有源表面间隔开第四距离。 第三信号耦合焊盘设置在第二非顶部金属层上，并电容耦合到第一芯片的第一信号耦合焊盘，从而提供第一芯片与第二芯片之间的接近通信。 由此，第一芯片的第一信号耦合焊盘与第二芯片的第三信号耦合焊盘之间的间隙变化受到第二距离和第四距离的严格控制。 因此，半导体封装的批量生产量增加。
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公开(公告)号：US20110298139A1
公开(公告)日：2011-12-08
申请号：US12794390
申请日：2010-06-04
IPC分类号： H01L23/538 , H01L23/52
CPC分类号： H01L25/0657 , H01L23/13 , H01L23/3171 , H01L23/48 , H01L23/49816 , H01L23/5383 , H01L24/05 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/85 , H01L2224/0401 , H01L2224/16225 , H01L2224/16227 , H01L2224/48091 , H01L2224/4824 , H01L2224/731 , H01L2224/85 , H01L2225/06527 , H01L2225/06562 , H01L2924/00014 , H01L2924/01033 , H01L2924/01076 , H01L2924/014 , H01L2924/15159 , H01L2924/15311 , H01L2924/1532 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and a second chip. The substrate has a first surface, a second surface and at least one through hole. The first chip is disposed adjacent to the first surface of the substrate. The first chip includes a first active surface and a plurality of first signal pads. Part of the first active surface is exposed to the through hole. The position of the first signal pads corresponds to the through hole. The second chip is disposed adjacent to the second surface. The second chip includes a second active surface and a plurality of second signal pads. Part of the second active surface is exposed to the through hole. The position of the second signal pads corresponds to the through hole, and the second signal pads are capacitively coupled to the first signal pads of the first chip, so as to provide proximity communication between the first chip and the second chip. Whereby, the strength of the first chip and the second chip is increased after being mounted to the substrate, so the yield of the semiconductor package is increased.
摘要翻译： 本发明涉及半导体封装。 半导体封装包括衬底，第一芯片和第二芯片。 衬底具有第一表面，第二表面和至少一个通孔。 第一芯片设置在基板的第一表面附近。 第一芯片包括第一有源表面和多个第一信号焊盘。 第一活性表面的一部分暴露于通孔。 第一信号垫的位置对应于通孔。 第二芯片设置成与第二表面相邻。 第二芯片包括第二有源表面和多个第二信号焊盘。 第二活性表面的一部分暴露于通孔。 第二信号焊盘的位置对应于通孔，并且第二信号焊盘电容耦合到第一芯片的第一信号焊盘，以便提供第一芯片和第二芯片之间的邻近通信。 由此，第一芯片和第二芯片的强度在安装到基板之后增加，因此增加了半导体封装的成品率。
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公开(公告)号：US20120091575A1
公开(公告)日：2012-04-19
申请号：US12905756
申请日：2010-10-15
CPC分类号： H01L23/48 , H01L24/02 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/81 , H01L24/83 , H01L25/0657 , H01L2224/02371 , H01L2224/02381 , H01L2224/0401 , H01L2224/14155 , H01L2224/16225 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/32105 , H01L2224/32145 , H01L2224/32225 , H01L2224/33183 , H01L2224/73103 , H01L2224/73203 , H01L2224/81191 , H01L2224/83192 , H01L2224/83815 , H01L2224/83851 , H01L2224/83903 , H01L2225/06517 , H01L2225/06531 , H01L2225/06551 , H01L2225/06555 , H01L2924/014 , H01L2924/00012
摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a substrate, at least one first chip, a dielectric layer and at least one second chip. The first chip is attached and electrically connected to the substrate. The first chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The dielectric layer is disposed on the first active surface. The second chip is attached and electrically connected to the substrate by metal bumps. The second chip includes a second active surface and a plurality of second signal coupling pads. The second active surface contacts the dielectric layer. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip. Whereby, the gap between the first signal coupling pads of the first chip and the second signal coupling pads of the second chip is controlled by the thickness of the dielectric layer. Therefore, the mass-production yield of the semiconductor package is increased.
摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括衬底，至少一个第一芯片，电介质层和至少一个第二芯片。 第一芯片被附接并电连接到基板。 第一芯片包括第一有源表面和多个第一信号耦合焊盘。 第一信号耦合焊盘设置成与第一有源表面相邻。 电介质层设置在第一有源表面上。 第二芯片通过金属凸块附接和电连接到基板。 第二芯片包括第二有源表面和多个第二信号耦合焊盘。 第二活性表面接触电介质层。 第二信号耦合焊盘设置成与第二有源表面相邻，并且电容耦合到第一芯片的第一信号耦合焊盘，以便提供第一芯片和第二芯片之间的接近通信。 由此，第一芯片的第一信号耦合焊盘与第二芯片的第二信号耦合焊盘之间的间隙由电介质层的厚度来控制。 因此，半导体封装的批量生产量增加。
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公开(公告)号：US20120049360A1
公开(公告)日：2012-03-01
申请号：US12872644
申请日：2010-08-31
IPC分类号： H01L23/538 , H01L21/60
CPC分类号： H01L21/6835 , H01L21/563 , H01L21/568 , H01L23/3114 , H01L24/27 , H01L25/0652 , H01L25/50 , H01L2224/1184 , H01L2224/131 , H01L2224/1329 , H01L2224/16145 , H01L2224/2784 , H01L2224/73104 , H01L2224/73204 , H01L2224/81005 , H01L2224/81801 , H01L2224/8185 , H01L2224/831 , H01L2225/06513 , H01L2924/15311 , H01L2924/15321 , H01L2924/014
摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface and a plurality of first signal coupling pads. The first signal coupling pads are disposed adjacent to the first active surface. The first metal bumps are disposed on the first active surface of the first layer chip. The second layer chip is electrically connected to the first layer chip, and includes a second active surface and a plurality of second signal coupling pads. The second active surface faces the first active surface of the first layer chip. The second signal coupling pads are disposed adjacent to the second active surface, and capacitively coupled to the first signal coupling pads of the first layer chip, so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps and the second layer chip, and the first metal bumps are partially exposed. Whereby, the bonding strength between the first layer chip and the second layer chip is increased because of the package body, so the yield of the semiconductor package is increased.
摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括至少一个第一层芯片，多个第一金属凸块，至少一个第二层芯片和封装体。 第一层芯片包括第一有源表面和多个第一信号耦合焊盘。 第一信号耦合焊盘设置成与第一有源表面相邻。 第一金属凸块设置在第一层芯片的第一有源表面上。 第二层芯片电连接到第一层芯片，并且包括第二有源表面和多个第二信号耦合焊盘。 第二活性表面面向第一层芯片的第一活性表面。 第二信号耦合焊盘设置成与第二有源表面相邻，并且电容耦合到第一层芯片的第一信号耦合焊盘，以便提供第一层芯片和第二层芯片之间的邻近通信。 封装体封装第一层芯片，第一金属凸块和第二层芯片，并且第一金属凸块部分地露出。 因此，由于封装体，第一层芯片和第二层芯片之间的结合强度增加，所以半导体封装的产量增加。
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公开(公告)号：US08072064B1
公开(公告)日：2011-12-06
申请号：US12819796
申请日：2010-06-21
IPC分类号： H01L21/00
CPC分类号： H01L23/48 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2225/06513 , H01L2225/06531 , H01L2225/06541 , H01L2924/00014 , H01L2924/1815 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes a first chip and a second chip. The first chip comprises a first active surface, at least one first non-top metal layer and a plurality of first signal coupling pads. The first non-top metal layer is disposed adjacent to and spaced apart from the first active surface by a second distance. The first signal coupling pads are disposed on the first non-top metal layer. The second chip is electrically connected to the first chip. The second chip comprises a second active surface, at least one second non-top metal layer and a plurality of third signal coupling pads. The second active surface faces the first active surface of the first chip. The second non-top metal layer is disposed adjacent to and spaced apart from the second active surface by a fourth distance. The third signal coupling pads are disposed on the second non-top metal layer and capacitively coupled to the first signal coupling pads of the first chip, so as to provide proximity communication between the first chip and the second chip. Whereby, the gap variation between the first signal coupling pads of the first chip and the third signal coupling pads of the second chip is under stringent control of the second distance and the fourth distance. Therefore, the mass-production yield of the semiconductor package is increased.
摘要翻译： 半导体封装及其制造方法技术领域本发明涉及半导体封装及其制造方法。 半导体封装包括第一芯片和第二芯片。 第一芯片包括第一有源表面，至少一个第一非顶部金属层和多个第一信号耦合焊盘。 第一非顶部金属层设置成与第一有源表面相邻并间隔开第二距离。 第一信号耦合焊盘设置在第一非顶部金属层上。 第二芯片电连接到第一芯片。 第二芯片包括第二有源表面，至少一个第二非顶部金属层和多个第三信号耦合焊盘。 第二活性表面面向第一芯片的第一有效表面。 第二非顶部金属层被布置成与第二有源表面相邻并且与第二有源表面间隔开第四距离。 第三信号耦合焊盘设置在第二非顶部金属层上，并电容耦合到第一芯片的第一信号耦合焊盘，从而提供第一芯片与第二芯片之间的接近通信。 由此，第一芯片的第一信号耦合焊盘与第二芯片的第三信号耦合焊盘之间的间隙变化受到第二距离和第四距离的严格控制。 因此，半导体封装的批量生产量增加。
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