Semiconductor device and manufacturing method thereof
    1.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号:US06617645B2

    公开(公告)日:2003-09-09

    申请号:US09730417

    申请日:2000-12-04

    IPC分类号: H01L2701

    摘要: An interlayer insulating film (104) that is formed on a substrate(101) so as to cover TFTs(102, 103) is planarized by mechanical polishing that is typified by CMP. Pixel electrodes (106, 107) are formed on the interlayer insulating film(104) and an insulating layer(108) is formed so as to cover the pixel electrodes. The insulating layer(108) is planarized by second mechanical polishing so that the surfaces of the pixel electrodes become flush with those of resulting buried insulating layers(112, 113). Since the pixel electrode surfaces have no steps, such problems as alignment failures of a liquid crystal material and a contrast reduction due to diffused reflection of light can be prevented.

    摘要翻译: 通过以CMP为代表的机械抛光来平坦化形成在基板(101)上以覆盖TFT(102,103)的层间绝缘膜(104)。 在层间绝缘膜(104)上形成像素电极(106,107),并且形成绝缘层(108)以覆盖像素电极。 绝缘层108通过第二机械抛光被平坦化,使得像素电极的表面与所得到的掩埋绝缘层(112,113)的表面齐平。 由于像素电极表面没有步骤,所以可以防止由于液晶材料的对准失败以及由于光的漫反射导致的对比度降低等问题。

    Semiconductor device and manufacturing method thereof
    2.
    发明授权
    Semiconductor device and manufacturing method thereof 失效
    半导体装置及其制造方法

    公开(公告)号:US6163055A

    公开(公告)日:2000-12-19

    申请号:US46198

    申请日:1998-03-23

    摘要: An interlayer insulating film (104) that is formed on a substrate (101) so as to cover TFTs (102, 103) is planarized by mechanical polishing that is typified by CMP. Pixel electrodes (106, 107) are formed on the interlayer insulating film (104) and an insulating layer (108) is formed so as to cover the pixel electrodes. The insulating layer (108) is planarized by second mechanical polishing so that the surfaces of the pixel electrodes become flush with those of resulting buried insulating layers (112, 113). Since the pixel electrode surfaces have no steps, such problems as alignment failures of a liquid crystal material and a contrast reduction due to diffused reflection of light can be prevented.

    摘要翻译: 通过以CMP为代表的机械抛光来平坦化形成在基板(101)上以覆盖TFT(102,103)的层间绝缘膜(104)。 在层间绝缘膜(104)上形成像素电极(106,107),并且形成绝缘层(108)以覆盖像素电极。 绝缘层108通过第二机械抛光被平坦化,使得像素电极的表面与所得到的掩埋绝缘层(112,113)的表面齐平。 由于像素电极表面没有步骤,所以可以防止由于液晶材料的对准失败以及由于光的漫反射导致的对比度降低等问题。

    Semiconductor device and manufacturing method thereof
    3.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体器件及其制造方法

    公开(公告)号:US06812082B2

    公开(公告)日:2004-11-02

    申请号:US10656170

    申请日:2003-09-08

    IPC分类号: H01L21336

    摘要: An interlayer insulating film (104) that is formed on a substrate (101) so as to cover TFTs (102, 103) is planarized by mechanical polishing that is typified by CMP. Pixel electrodes (106, 107) are formed on the interlayer insulating film (104) and an insulating layer (108) is formed so as to cover the pixel electrodes. The insulating layer (108) is planarized by second mechanical polishing so that the surfaces of the pixel electrodes become flush with those of resulting buried insulating layers (112, 113). Since the pixel electrode surfaces have no steps, such problems as alignment failures of a liquid crystal material and a contrast reduction due to diffused reflection of light can be prevented.

    摘要翻译: 通过以CMP为代表的机械抛光来平坦化形成在基板(101)上以覆盖TFT(102,103)的层间绝缘膜(104)。 在层间绝缘膜(104)上形成像素电极(106,107),并且形成绝缘层(108)以覆盖像素电极。 绝缘层108通过第二机械抛光被平坦化,使得像素电极的表面与所得到的掩埋绝缘层(112,113)的表面齐平。 由于像素电极表面没有步骤,所以可以防止由于液晶材料的对准失败以及由于光的漫反射导致的对比度降低等问题。

    Etching method and apparatus
    6.
    发明授权
    Etching method and apparatus 失效
    蚀刻方法和装置

    公开(公告)号:US5861103A

    公开(公告)日:1999-01-19

    申请号:US687968

    申请日:1996-07-29

    摘要: Each of a pair of electrodes is provided in high-frequency power supply. A sample placed on the one of electrodes is etched by RIE (reactive ion etching) method. At the time, the power supply connected to the other electrode opposite to the sample is actuated first, and then the power supply of the one electrode on which the sample has been placed is actuated. And then the power supply connected to the other electrode is stopped. Therefore a bias voltage applied to the sample is gradually varied to suppress the abrupt application of a voltage to the sample.

    摘要翻译: 一对电极中的每一个设置在高频电源中。 通过RIE(反应离子蚀刻)方法蚀刻放置在电极之一上的样品。 此时,首先启动与样品相对的另一电极连接的电源,然后致动其上放置样品的一个电极的电源。 然后连接到另一个电极的电源停止。 因此,施加到样品的偏置电压逐渐变化,以抑制对样品的电压的突然施加。

    Method of manufacturing gate insulated field effect transistors
    9.
    发明授权
    Method of manufacturing gate insulated field effect transistors 失效
    栅极绝缘场效应晶体管的制造方法

    公开(公告)号:US07507615B2

    公开(公告)日:2009-03-24

    申请号:US10401891

    申请日:2003-03-31

    IPC分类号: H01L21/84

    摘要: A method of manufacturing thin film field effect transistors is described. The channel region of the transistors is formed by depositing an amorphous semiconductor film in a first sputtering apparatus followed by thermal treatment for converting the amorphous phase to a polycrystalline phase. The gate insulating film is formed by depositing an oxide film in a second sputtering apparatus connected to the first apparatus through a gate valve. The sputtering for the deposition of the amorphous semiconductor film is carried out in an atmosphere comprising hydrogen in order to introduce hydrogen into the amorphous semiconductor film. On the other hand the gate insulating oxide film is deposited by sputtering in an atmosphere comprising oxygen.

    摘要翻译: 描述制造薄膜场效应晶体管的方法。 通过在第一溅射装置中沉积非晶半导体膜,然后进行热处理以将非晶相转化为多晶相来形成晶体管的沟道区。 栅极绝缘膜通过在通过闸阀连接到第一装置的第二溅射装置中沉积氧化膜而形成。 用于沉积非晶半导体膜的溅射在包括氢的气氛中进行,以便将氢引入到非晶半导体膜中。 另一方面,通过溅射在包含氧的气​​氛中沉积栅极绝缘氧化物膜。