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公开(公告)号:US20050156195A1
公开(公告)日:2005-07-21
申请号:US11079166
申请日:2005-03-14
申请人: Young-Kai Chen , Lay-Lay Chua , Vincent Houtsma , Rose Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
发明人: Young-Kai Chen , Lay-Lay Chua , Vincent Houtsma , Rose Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
IPC分类号: H01L21/331 , H01L29/737 , H01L29/739 , H01L31/0328 , H01L31/0336
CPC分类号: H01L29/66318 , H01L29/7371
摘要: A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant ions into a portion of one or more of the semiconductor layers. The sequence of semiconductor layers includes a collector layer, a base layer that is in contact with the collector layer, and an emitter layer that is in contact with the base layer. The implanting uses a process in which the implant mask stops dopant ions from penetrating into a portion of the sequence of layers.
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公开(公告)号:US20090029536A1
公开(公告)日:2009-01-29
申请号:US12286239
申请日:2008-09-29
申请人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
发明人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
IPC分类号: H01L21/425
CPC分类号: H01L29/66318 , H01L29/7371
摘要: A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant ions into a portion of one or more of the semiconductor layers. The sequence of semiconductor layers includes a collector layer, a base layer that is in contact with the collector layer, and an emitter layer that is in contact with the base layer. The implanting uses a process in which the implant mask stops dopant ions from penetrating into a portion of the sequence of layers.
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公开(公告)号:US06911716B2
公开(公告)日:2005-06-28
申请号:US10243369
申请日:2002-09-13
申请人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
发明人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
IPC分类号: H01L21/331 , H01L29/737 , H01L27/082
CPC分类号: H01L29/66318 , H01L29/7371
摘要: A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant ions into a portion of one or more of the semiconductor layers. The sequence of semiconductor layers includes a collector layer, a base layer that is in contact with the collector layer, and an emitter layer that is in contact with the base layer. The implanting uses a process in which the implant mask stops dopant ions from penetrating into a portion of the sequence of layers.
摘要翻译: 一种用于制造双极晶体管的方法,包括形成垂直的半导体层序列,在最后形成的半导体层上形成注入掩模,以及将掺杂离子注入到一个或多个半导体层的一部分中。 半导体层的序列包括集电极层,与集电极层接触的基极层和与基极层接触的发射极层。 植入使用其中植入掩模阻止掺杂剂离子渗入层序列的一部分的过程。
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公开(公告)号:US07595249B2
公开(公告)日:2009-09-29
申请号:US12286239
申请日:2008-09-29
申请人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
发明人: Young-Kai Chen , Lay-Lay Chua , Vincent Etienne Houtsma , Rose Fasano Kopf , Andreas Leven , Chun-Ting Liu , Wei-Jer Sung , Yang Yang
IPC分类号: H01L21/331 , H01L21/8222
CPC分类号: H01L29/66318 , H01L29/7371
摘要: A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant ions into a portion of one or more of the semiconductor layers. The sequence of semiconductor layers includes a collector layer, a base layer that is in contact with the collector layer, and an emitter layer that is in contact with the base layer. The implanting uses a process in which the implant mask stops dopant ions from penetrating into a portion of the sequence of layers.
摘要翻译: 一种用于制造双极晶体管的方法,包括形成垂直的半导体层序列,在最后形成的半导体层上形成注入掩模,以及将掺杂离子注入到一个或多个半导体层的一部分中。 半导体层的序列包括集电极层,与集电极层接触的基极层和与基极层接触的发射极层。 植入使用其中植入掩模阻止掺杂剂离子渗入层序列的一部分的过程。
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公开(公告)号:US20050230784A1
公开(公告)日:2005-10-20
申请号:US10341777
申请日:2003-01-14
申请人: Yang Yang , Chun-Ting Liu , Rose Kopf , Chen-Jung Chen , Lay-Lay Chua
发明人: Yang Yang , Chun-Ting Liu , Rose Kopf , Chen-Jung Chen , Lay-Lay Chua
CPC分类号: G02B6/10 , G02B6/12004 , G02B6/1221 , G02B6/26 , G02B2006/12038 , G02B2006/12061 , G02B2006/12069 , G02B2006/12097 , G02B2006/12176 , G02B2006/12197
摘要: The present invention provides a method for adhering dielectric layers to metals, in particular inert metals, using an adhesive layer comprising silicon-rich silicon nitride. Good adhesion is achieved at temperatures of less than 300° C., thereby facilitating the fabrication of semiconductor structures containing II-VI and III-V semiconductors.
摘要翻译: 本发明提供一种使用包含富硅氮化硅的粘合剂层将电介质层粘附到金属,特别是惰性金属的方法。 在低于300℃的温度下实现良好的附着力,从而有助于制造含有II-VI和III-V半导体的半导体结构。
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公开(公告)号:US20050255692A1
公开(公告)日:2005-11-17
申请号:US11184232
申请日:2005-07-19
申请人: Yang Yang , Chun-Ting Liu , Rose Kopf , Chen-Jung Chen , Lay-Lay Chua
发明人: Yang Yang , Chun-Ting Liu , Rose Kopf , Chen-Jung Chen , Lay-Lay Chua
IPC分类号: H01L21/02 , H01L21/316 , H01L21/318 , H01L21/4763
CPC分类号: H01L21/3185 , H01L21/0217 , H01L21/02304 , H01L21/31612 , H01L28/65
摘要: The present invention provides a method for adhering dielectric layers to metals, in particular inert metals, using an adhesive layer comprising silicon-rich silicon nitride. Good adhesion is achieved at temperatures of less than 300° C., thereby facilitating the fabrication of semiconductor structures containing II-VI and III-V semiconductors.
摘要翻译: 本发明提供一种使用包含富硅氮化硅的粘合剂层将电介质层粘附到金属,特别是惰性金属的方法。 在低于300℃的温度下实现良好的附着力,从而有助于制造含有II-VI和III-V半导体的半导体结构。
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公开(公告)号:US06610599B1
公开(公告)日:2003-08-26
申请号:US10175459
申请日:2002-06-19
申请人: Lay-Lay Chua , Chun-Ting Liu , Yang Yang
发明人: Lay-Lay Chua , Chun-Ting Liu , Yang Yang
IPC分类号: H01L2144
CPC分类号: H01L21/02063 , C11D3/3947 , C11D7/10 , C11D11/0047 , H01L21/31138 , H01L21/76814
摘要: A method for making an ICD or MEOD structure includes dry etching a structure to produce one or more via holes in an upper layer of the structure. The dry etching step stops on a metal layer that underlies the upper layer in the structure. The method also includes cleaning the dry etched structure with an aqueous solution that includes hydrogen peroxide and either an ammonium salt or an amine salt.
摘要翻译: 制造ICD或MEOD结构的方法包括干式蚀刻结构以在该结构的上层中产生一个或多个通孔。 干蚀刻步骤停止在结构中的上层下方的金属层上。 该方法还包括用包含过氧化氢和铵盐或胺盐的水溶液清洗干蚀刻结构。
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公开(公告)号:US08421231B2
公开(公告)日:2013-04-16
申请号:US11988183
申请日:2006-07-03
IPC分类号: H01L23/48
CPC分类号: H01B1/22 , H01L2924/0002 , H01L2924/00
摘要: The present invention provides a conductive composite comprising: suspension matrix, metal nanoparticles suspended within the suspension matrix, wherein the conductive composite has a conductivity greater than 104 S cm−1.
摘要翻译: 本发明提供一种导电复合材料,其包括:悬浮基质,悬浮在悬浮基质内的金属纳米颗粒,其中导电复合材料的导电率大于104Scm-1。
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公开(公告)号:US07884355B2
公开(公告)日:2011-02-08
申请号:US10556404
申请日:2004-05-12
IPC分类号: H01L35/24
CPC分类号: H01L51/0002 , C07C247/16 , G03C1/695 , H01L51/0003 , H01L51/0035 , H01L51/0037 , H01L51/0038 , H01L51/0039 , H01L51/0043 , H01L51/0059 , H01L51/052
摘要: A transistor including a semiconductive layer; and a gate dielectric layer comprising an insulating polymer, characterised in that the insulating polymer is crosslinked and comprises one or more units having a low cohesive-energy-density and one or more crosslinking groups and the insulating polymer includes substantially no residual —OH leaving groups.
摘要翻译: 一种包括半导体层的晶体管; 以及包含绝缘聚合物的栅极电介质层,其特征在于,所述绝缘聚合物是交联的,并且包含具有低内聚能量密度和一个或多个交联基团的一个或多个单元,并且所述绝缘聚合物基本上不包括残余的-OH离去基团 。
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公开(公告)号:US07638793B2
公开(公告)日:2009-12-29
申请号:US10586149
申请日:2005-01-17
IPC分类号: H01L29/08
CPC分类号: H01L51/5296 , B82Y10/00 , H01L21/02118 , H01L21/02126 , H01L21/3122 , H01L51/0022 , H01L51/0023 , H01L51/0036 , H01L51/0038 , H01L51/0039 , H01L51/0043 , H01L51/0046 , H01L51/0508 , H01L51/0516 , H01L51/0545 , H01L51/52 , H01L51/5203 , H01L51/56 , H05B33/08
摘要: An n-channel or ambipolar field-effect transistor including an organic semiconductive layer having an electron affinity EAsemicond; and an organic gate dielectric layer forming an interface with the semiconductive layer; characterized in that the bulk concentration of trapping groups in the gate dielectric layer is less than 1018 cm−3, where a trapping group is a group having (i) an electron affinity EAX greater than or equal to EAsemicond and/or (ii) a reactive electron affinity EArxn greater than or equal to (EAsemicond.−2 eV).
摘要翻译: n沟道或双极场效应晶体管,其包括具有电子亲和力的有机半导体层; 以及形成与半导体层的界面的有机栅极介电层; 其特征在于栅极电介质层中俘获基团的堆积浓度小于1018cm-3,其中俘获基团是具有(i)电子亲和力EAX大于或等于EAsemicond的基团和/或(ii) 反应性电子亲和力EArxn大于或等于(EAsemicond.-2 eV)。
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