公开(公告)号：US20220319938A1

公开(公告)日：2022-10-06

申请号：US17700747

申请日：2022-03-22

申请人： Japan Aviation Electronics Industry, Limited

发明人： Shinji UEDA ,  Osamu HASHIGUCHI

IPC分类号： H01L23/045 ,  H01L23/10

摘要： A device comprises a first sealing member, a second sealing member, a first circuit member and a second circuit member. The first sealing member comprises, as a base thereof, a first film formed of a film and comprises a conductive portion made of conductor. The device is formed with a closed space. The closed space is enclosed by the first sealing member and the second sealing member and is shut off from an outer space located outside the device. The first circuit member and the second circuit member are shut in the closed space and comprise a first contact point and a second contact point, respectively. At least one of the first circuit member and the second circuit member comprises an electrode. The conductive portion is in contact with the electrode in the closed space and is partially exposed to the outer space located outside the device.

公开(公告)号：US10811331B2

公开(公告)日：2020-10-20

申请号：US16285635

申请日：2019-02-26

申请人： PA&E, Hermetic Solutions Group, LLC

发明人： Hua Xia ,  Nathan Foster ,  Nelson Settles ,  Steve Hall

IPC分类号： H01L23/31 ,  H01L23/045 ,  H01L23/26 ,  H01L23/373

摘要： A hermetically sealed electronic package may include a thermal panel having a panel interior surface and a panel exterior surface with electronic device(s) in thermal communication with the panel interior surface. An enclosure, isolating environmental communication from internal electronic devices and modules, may be coupled to the thermal panel, and the enclosure may have an enclosure interior surface and an enclosure exterior surface. A plurality of electrical feedthroughs may be coupled to the package enclosure for signal and data transmission, and the conducting pin(s) in every electrical feedthrough may be bonded by a hydrophobic sealing material for harsh environmental electrical signal, data and power transmission. The ratio of sealing length over sealing bead diameter in the electrical feedthrough subassembly may have a preferred value from 2 to 3; and the ratio of the sealing bead diameter over pin diameter in the electrical feedthrough subassembly may have a preferred value from 1.5 to 2.0, where a preferred thermal stress resistance could be designed for making highly hermetic sealed electronic package.

公开(公告)号：US10699978B2

公开(公告)日：2020-06-30

申请号：US16124448

申请日：2018-09-07

申请人： Infineon Technologies Austria AG

发明人： Ralf Otremba ,  Amirul Afiq Hud ,  Teck Sim Lee ,  Xaver Schloegel ,  Bernd Schmoelzer

IPC分类号： H01L23/045 ,  H01L23/36 ,  H01L23/433 ,  H01L23/48 ,  H01L23/367 ,  H01L23/31 ,  H01L23/495

摘要： A package encloses a power semiconductor die and has a package body with a package top side, package footprint side and package sidewalls. The die has first and second load terminals for blocking a blocking voltage. A lead frame structure electrically and mechanically couples the package to a support and includes an outside terminal extending out of the package footprint side and/or the sidewalls, and is electrically connected with the first load terminal. A top layer arranged at the package top side is electrically connected with the second load terminal. A creepage length between the electrical potential of the outside terminal and the electrical potential of the top layer is defined by a package body surface contour. The surface contour is formed at least by the package top side and package sidewall. At least one structural feature also forms the surface contour is configured to increase the creepage length.

公开(公告)号：US10062620B1

公开(公告)日：2018-08-28

申请号：US15487193

申请日：2017-04-13

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Jui-Chung Hsu ,  Wu-Der Yang ,  Chia-Chi Hsu

IPC分类号： H01L23/045 ,  H01L23/552

摘要： A die device includes a die including an active layer; and an interconnect feature configured for electrical connection of the active layer, wherein the interconnect feature is in contact with a substrate in the die; and a bump, independent of the die, configured for electrical connection of the active layer.

公开(公告)号：US09515473B2

公开(公告)日：2016-12-06

申请号：US14674312

申请日：2015-03-31

申请人： Hitachi Metals, Ltd.

发明人： Masaaki Imahori

IPC分类号： H01R9/05 ,  H02G15/04 ,  H02G15/013 ,  H01J5/00 ,  H01J15/00 ,  H05K5/06 ,  H01L23/045 ,  H01L23/055 ,  H01R13/52 ,  H01R13/40

CPC分类号： H02G15/046 ,  H02G15/013

摘要： An electric wire holding device is composed of an electric wire holding member made of a resin to hold an electric wire, a cylindrical member made of an electrically conductive metal, including an inner surface to be mated around and receive at least a mating portion of the electric wire holding member, and a plurality of protrusions formed around an outer circumference of the at least mating portion of the electric wire holding member for the cylindrical member to be mated therearound. The plurality of protrusions are brought into contact with the inner surface of the cylindrical member.

摘要翻译： 电线保持装置由保持电线的由树脂制成的电线保持部件构成，由导电金属制成的圆柱形部件，包括要被配合的内表面，并且至少接收所述电线的配合部分 电线保持构件，以及多个突起，形成在用于圆形构件的电线保持构件的至少配合部分的外周的周围。 多个突起与圆筒形构件的内表面接触。

公开(公告)号：US09159634B2

公开(公告)日：2015-10-13

申请号：US14158690

申请日：2014-01-17

申请人： Schott AG

发明人： Robert Hettler ,  Kenneth Tan ,  Georg Mittermeier ,  Karsten Droegemueller

IPC分类号： H01L23/48 ,  H01L29/32 ,  H01L23/08 ,  H01L23/66 ,  H01L23/64 ,  H01L23/045 ,  H01L23/31

CPC分类号： H01L23/08 ,  H01L23/045 ,  H01L23/3157 ,  H01L23/64 ,  H01L23/66 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6622 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/2065 ,  H01L2924/20649 ,  H01L2924/20645 ,  H01L2924/20644 ,  H01L2924/20643 ,  H01L2224/45099 ,  H01L2924/00

摘要： A transistor outline housing is provided that has bonding wires on an upper surface. The bonding wires are reduced in length and have connection leads with an excess length at an end opposite the bonding end.

摘要翻译： 提供了在上表面具有接合线的晶体管轮廓外壳。 接合线的长度减小，并且在与接合端相对的端部处具有连续引线，其具有多余的长度。

公开(公告)号：US08309384B2

公开(公告)日：2012-11-13

申请号：US12753514

申请日：2010-04-02

申请人： Juergen Leib

发明人： Juergen Leib

IPC分类号： H01L23/045

CPC分类号： H01L24/05 ,  H01L21/50 ,  H01L23/481 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/13111 ,  H01L2924/00015

摘要： A wafer level packaging process for packaging components is provided. The process includes permanently connecting a functional side of a base substrate to a covering substrate at wafer level so that a plurality of functional regions on the functional side are in each case packaged to form a wafer level package, the plurality of functional regions being spaced apart from one another on the functional side; producing contact-connection recesses in the base substrate to uncover contact surfaces on the base substrate from a back surface of the base substrate; dividing the base substrate into body regions and connection regions; thinning the body regions or the connection regions until the wafer level package has different thicknesses in the body regions and the connection regions; and dicing wafer level package into chips along predefined cutting lines between the plurality of functional regions.

摘要翻译： 提供了用于包装部件的晶片级封装工艺。 该方法包括将基底基板的功能侧永久地连接到晶片级的覆盖基板上，使得功能侧上的多个功能区域在每种情况下都被封装以形成晶片级封装，多个功能区域间隔开 在功能方面彼此; 在所述基底基板中产生接触连接凹部，以从所述基底基板的背面露出所述基底基板上的接触表面; 将基底基体分成体区域和连接区域; 使身体区域或连接区域变薄，直到晶片级封装在主体区域和连接区域中具有不同的厚度; 以及沿着所述多个功能区域之间的预定切割线将晶片级封装切割成芯片。

公开(公告)号：US5847453A

公开(公告)日：1998-12-08

申请号：US820817

申请日：1997-03-19

申请人： Hiroshi Uematsu ,  Hiroshi Kudoh ,  Masanobu Urabe

发明人： Hiroshi Uematsu ,  Hiroshi Kudoh ,  Masanobu Urabe

IPC分类号： H01L23/12 ,  H01L23/02 ,  H01L23/045 ,  H01L23/552 ,  H01L23/66 ,  H01L25/04 ,  H01L25/18 ,  H01P3/08 ,  H01P5/08 ,  H01L23/34 ,  H01L29/40

CPC分类号： H01L23/66 ,  H01L23/045 ,  H01L23/552 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4823 ,  H01L2224/48599 ,  H01L2224/49175 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15312 ,  H01L2924/157 ,  H01L2924/1616 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A microwave circuit package includes a metallic base plate on which are mounted a plurality of monolithic microwave integrated circuits (MMICs) and a spacer, made of a dielectric material, separating the MMICs from each other, and the MMICs and spacer are sealed in the package. The provision of the spacer substantially reduces the volume of the interior space of the package. A dielectric substrate having generally the same height as substrates of the MMICs may also be mounted on the metallic base plate, and a strip conductor may be provided on the dielectric substrate so as to form a microstrip line thereon.

摘要翻译： 微波电路封装包括金属基板，多个单片微波集成电路（MMIC）和间隔物由电介质材料制成，将MMIC彼此分开，并将MMIC和间隔件密封在封装中 。 间隔件的设置大大减小了包装内部空间的体积。 具有与MMIC的基板大致相同高度的电介质基板也可以安装在金属基板上，并且可以在电介质基板上设置带状导体，以在其上形成微带线。

公开(公告)号：US5025347A

公开(公告)日：1991-06-18

申请号：US336429

申请日：1989-04-11

申请人： Masamichi Shindo ,  Toshiharu Sakurai ,  Hideo Taguchi ,  Nobu Izawa

发明人： Masamichi Shindo ,  Toshiharu Sakurai ,  Hideo Taguchi ,  Nobu Izawa

IPC分类号： H01L23/12 ,  H01L23/04 ,  H01L23/045 ,  H01L23/373

CPC分类号： H01L23/045 ,  H01L23/3731 ,  H01L23/3736 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/16152

摘要： A semiconductor device of a type having a pin grid array, comprises a printed circuit board and a planar metal stem with a plurality of through holes. The stem is made of metal having a coefficient of thermal expansion .alpha.s. The printed circuit board has a predetermined wiring pattern on its upper surface and is made of a material having a maximum coefficient .alpha.p in the widthwise direction. The printed circuit board is superposed over the upper surface of the metal stem. A plurality of lead pins have upper portions inserted into the through holes of the stem and board and are in alignment with each other when the board and the stem are superposed one upon another. Connecting members connect the upper portions of the lead pins with their corresponding wiring patterns. In the semiconductor device, the absolute value .DELTA..alpha. of the difference between the maximum coefficient .alpha.p of the board and the coefficient .alpha.s of the stem (.DELTA..alpha.=.alpha.p -.alpha.s) is less than or equal to "1.52.times.10.sup.-4 /L" (.DELTA..alpha..ltoreq.1.52 .times.10.sup.-4 /L).

摘要翻译： 具有针格阵列的类型的半导体器件包括印刷电路板和具有多个通孔的平面金属杆。 杆由具有热膨胀系数αs的金属制成。 印刷电路板在其上表面上具有预定的布线图案，并且由在宽度方向上具有最大系数αp的材料制成。 印刷电路板重叠在金属杆的上表面上。 多个引导销具有插入到杆和板的通孔中的上部，并且当板和杆彼此叠置时彼此对准。 连接构件将引脚的上部与其对应的布线图案相连。 在半导体器件中，板的最大系数αp与茎的系数αs之差（DELTAα=αp-αs）的绝对值DELTAα小于或等于“1.52×10 -3” 4 / L“（DELTAα

公开(公告)号：US4622434A

公开(公告)日：1986-11-11

申请号：US672760

申请日：1984-11-19

申请人： Hart Shekerjian

发明人： Hart Shekerjian

IPC分类号： H01L23/04 ,  H01L23/045 ,  H05K5/03

CPC分类号： H01L23/04 ,  H01L23/045 ,  H01L2924/0002

摘要： Packaging of discrete semiconductor devices is improved by dimpling metal caps prior to assembly onto headers and welding.The dimpled caps provide a friction fit to the headers, whereby fewer assembled, but unwelded packages separate during handling. The dimples are more economical and more reliable than prior art crimps which perform a similar function.

摘要翻译： 在组装到集管和焊接之前，通过使金属盖凹陷来改善分立半导体器件的封装。 凹槽盖提供与集管的摩擦配合，由此在处理期间较少组装但未焊接的包装分离。 凹坑比执行类似功能的现有技术卷曲更经济和更可靠。