公开(公告)号：EP1338914A3

公开(公告)日：2003-11-19

申请号：EP03076155.5

申请日：1996-11-19

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Lee, Jueng-gil, 107-103 Chungkoo Apt. ,  Nam, Hyo-rak, Ka-209 Sunghwan Villa ,  Lee, Jung-ho

IPC分类号： G02F1/1362

CPC分类号： G02F1/136286 ,  G02F1/1345 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13629 ,  H01L21/28008 ,  H01L23/4827 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a liquid crystal display is provided. The method includes the steps of forming a gate electrode and a gate line on a substrate, wherein said gate electrode and said gate line comprises at least one refractory metal layer; forming an insulating film on said gate electrode and said gate line; forming an amorphous silicon film pattern and a doped amorphous silicon film pattern on said insulating film, wherein said doped amorphous silicon film pattern is formed entirely on said amorphous silicon film pattern and a whole bottom surface of said doped amorphous silicon film pattern is directly contacted to said amorphous silicon film pattern; forming a source electrode and a drain electrode composed of a third metal film and then etching away a portion of said doped amorphous silicon film pattern located between said source electrode and said drain electrode; forming a protection film pattern having a first contact hole which exposes a portion of said drain electrode and a second contact hole which exposes a portion of said gate line, wherein said protection film pattern contacts a top surface of said amorphous silicon pattern located between said source electrode and said drain electrode and said insulating film under said second contact hole is etched away to expose a portion of said gate line; and forming a first pixel electrode pattern which is connected to said drain electrode through said first contact hole and a second pixel electrode pattern which is electrically connected to said gate line through said second contact hole. It is thus possible to reduce the number of photolithography processes and to prevent a battery effect and generation of a hillock.

摘要翻译： 提供了一种用于制造液晶显示器的方法。 该方法包括以下步骤：在衬底上形成栅电极和栅极线，其中所述栅电极和所述栅极线包括至少一个难熔金属层; 在所述栅电极和所述栅线上形成绝缘膜; 在所述绝缘膜上形成非晶硅膜图案和掺杂非晶硅膜图案，其中所述掺杂非晶硅膜图案完全在所述非晶硅膜图案上形成，并且所述掺杂非晶硅膜图案的整个底面直接接触 所述非晶硅膜图案; 形成由第三金属膜构成的源电极和漏电极，然后蚀刻掉位于所述源电极和所述漏电极之间的所述掺杂非晶硅膜图案的一部分; 形成具有暴露所述漏电极的一部分的第一接触孔和暴露所述栅线的一部分的第二接触孔的保护膜图案，其中所述保护膜图案接触位于所述源极之间的所述非晶硅图案的顶表面， 将所述第二接触孔下方的所述漏电极和所述绝缘膜蚀刻掉以暴露所述栅线的一部分; 以及形成通过所述第一接触孔连接到所述漏电极的第一像素电极图案和通过所述第二接触孔电连接到所述栅线的第二像素电极图案。 因此可以减少光刻工艺的数量并防止电池效应和小丘的产生。

公开(公告)号：EP0823731A3

公开(公告)日：1999-11-03

申请号：EP97112437.5

申请日：1997-07-21

申请人： MOTOROLA, INC.

发明人： Cronin, Wayne A. ,  Scrivner, Brian L. ,  Koetz, Kirby F. ,  Parsey, John M. Jr.

IPC分类号： H01L23/482

CPC分类号： H01L24/29 ,  H01L23/4827 ,  H01L2224/04026 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/83191 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01016 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/01028 ,  H01L2924/01062 ,  H01L2924/00012 ,  H01L2924/00

摘要： A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20). A barrier layer (38) that contains a nickel alloy is formed on the adhesion layer (37). A protective layer (39) is formed on the barrier layer (38). The barrier layer (38) inhibits solder components from diffusing toward the semiconductor substrate (20) during high temperature processing.

公开(公告)号：EP0823731A2

公开(公告)日：1998-02-11

申请号：EP97112437.5

申请日：1997-07-21

申请人： MOTOROLA, INC.

发明人： Cronin, Wayne A. ,  Scrivner, Brian L. ,  Koetz, Kirby F. ,  Parsey, John M. Jr.

IPC分类号： H01L23/482

CPC分类号： H01L24/29 ,  H01L23/4827 ,  H01L2224/04026 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/83191 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01016 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/01028 ,  H01L2924/01062 ,  H01L2924/00012 ,  H01L2924/00

摘要： A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20). A barrier layer (38) that contains a nickel alloy is formed on the adhesion layer (37). A protective layer (39) is formed on the barrier layer (38). The barrier layer (38) inhibits solder components from diffusing toward the semiconductor substrate (20) during high temperature processing.

摘要翻译： 一种用于半导体器件（23）的高温金属化系统。 半导体器件（23）具有多层金属化系统（36）。 金属化系统（36）的粘合层（37）形成在半导体衬底（20）上。 在粘合层（37）上形成含有镍合金的阻挡层（38）。 在阻挡层（38）上形成保护层（39）。 阻挡层（38）在高温处理期间阻止焊料成分向半导体衬底（20）扩散。

公开(公告)号：EP0513273B1

公开(公告)日：1996-12-18

申请号：EP91920068.3

申请日：1991-10-24

申请人： HARRIS CORPORATION

发明人： NEUGEBAUER, Constantine, Alois ,  GLASCOCK, Homer, Hopson, II ,  PAIK, Kyung, Wook ,  MCMULLEN, James, Gilbert

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L29/43 ,  B23K31/02

CPC分类号： H01L24/80 ,  H01L23/4827 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00

摘要： Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high current contacts to the chip. The foil is formed into appropriate electrical network-contact patterns (40) and is bonded to the silicon chip only where aluminum metallization exists on the chip. Leaf (wing) portions (46) of the foil extend beyond the boundaries of the silicon chip for subsequent retroflexing over the foil to provide electrical contact at predesignated locations (49). External contacts to the foil are made by penetrating through a ceramic lid positioned directly above the foil area. Thus, direct thermocompression bonding of a principally copper foil to aluminum semiconductor pads can replace current gold detent/pump connections by securing a copper conductor to a silicon chip through an intermetallic AuAl2 link and an aluminum stratum.

公开(公告)号：EP0186585B1

公开(公告)日：1991-02-06

申请号：EP85402542.6

申请日：1985-12-18

申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

发明人： Lawler, Harlan ,  Phy, William

IPC分类号： H01L23/48

CPC分类号： H01L24/83 ,  H01L23/4827 ,  H01L23/488 ,  H01L24/02 ,  H01L24/29 ,  H01L2224/04026 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/83191 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A process for bonding a silicon die to a package. This process comprises the following steps: (a) providing to the back surface of the die a barrier layer which is impervious to silicon; (b) providing to the barrier layer a layer of gold; and (c) bonding the die to the package by activating a binder composition disposed at the interface of the package and the layer of gold. The barrier layer prevents the migration of silicon to the gold layer, both at the time of application of the gold layer to the die and at the time of bonding the die to the package. Titanium and tungsten are preferred barrier layer materials, while the preferred binder composition is a gold-/ tin alloy solder. The prevention of silicon migration into the gold produces highly reliable bonds.

公开(公告)号：EP0395862A2

公开(公告)日：1990-11-07

申请号：EP90104978.3

申请日：1990-03-16

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Yamada, Yoshiki, c/o Intellectual Property Div. ,  Yamaki, Bunshiro, c/o Intellectual Property Div.

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L23/481 ,  H01L23/4827 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85399 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device comprises a semiconductor substrate (20) of one conductivity type having low resistivity, which is used as a conductive member and is mounted on a lead member (9d) held at a common electric potential, a first epitaxial layer (21) of one conductivity type having high resistivity and provided on the semiconductor substrate (20), a second epitaxial layer (22) of an opposite conductivity type provided on the first epitaxial layer (21), and at least one semiconductor layer (30) of one conductivity type having low resistivity, which reaches the semiconductor substrate (20) through both the second and first epitaxial layers (22, 21) so as to provide an electrical path to the lead member (9d) therethrough and is isolated from the second epitaxial layer (22) through a PN junction. A circuit element such as transistors and resistors is provided in each island region provided by the second epitaxial layer (22), and ground electrodes or their interconnection layers (26g) of the circuit elements are electrically connected to the semiconductor susbtrate (20) through the semiconductor layer (30), which serves as a lead member, without using a bonding wire (8d).

摘要翻译： 一种半导体器件包括具有低电阻率的一种导电类型的半导体衬底（20），其用作导电构件并安装在保持在公共电位的引线构件（9d）上，第一外延层（21） 具有高电阻率的一种导电类型并且设置在半导体衬底（20）上，设置在第一外延层（21）上的具有相反导电类型的第二外延层（22）和至少一个导电性的半导体层（30） 具有低电阻率，其通过第二和第二外延层（22,21）通过第二外延层（22,21）到达半导体衬底（20），从而提供通向其中的引线部件（9d）的电通路，并与第二外延层 22）通过PN结。 在由第二外延层（22）提供的每个岛区域中设置诸如晶体管和电阻器的电路元件，并且电路元件的接地电极或其互连层（26g）通过 半导体层（30），其用作引线构件，而不使用接合线（8d）。

公开(公告)号：EP2149154B1

公开(公告)日：2018-04-25

申请号：EP08825948.6

申请日：2008-03-31

申请人： Cree, Inc.

发明人： DAS, Mrinal Kanti ,  ZHANG, Qingchun ,  CLAYTON, John, M., Jr. ,  DONOFRIO, Matthew

IPC分类号： H01L29/739 ,  H01L21/04 ,  H01L21/268 ,  H01L23/482 ,  H01L29/10 ,  H01L29/66

CPC分类号： H01L29/66068 ,  H01L21/0475 ,  H01L21/0485 ,  H01L21/268 ,  H01L23/4827 ,  H01L29/1095 ,  H01L29/7395 ,  H01L2224/04026 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00

摘要： A silicon carbide power device is fabricated by forming a p-type silicon carbide epitaxial layer on an n-type silicon carbide substrate, and forming a silicon carbide power device structure on the p-type silicon carbide epitaxial layer. The n-type silicon carbide substrate is at least partially removed, so as to expose the p-type silicon carbide epitaxial layer. An ohmic contact is formed on at least some of the p-type silicon carbide epitaxial layer that is exposed. By at least partially removing the n-type silicon carbide substrate and forming an ohmic contact on the p-type silicon carbide epitaxial layer, the disadvantages of using a p-type substrate may be reduced or eliminated. Related structures are also described.

公开(公告)号：EP2698807B1

公开(公告)日：2015-09-23

申请号：EP11863268.6

申请日：2011-09-09

申请人： Shindengen Electric Manufacturing Co., Ltd.

发明人： OHNO, Jun-ichi

IPC分类号： H01L21/04 ,  H01L21/28 ,  H01L21/3065

CPC分类号： H01L21/76889 ,  H01L21/0485 ,  H01L21/0495 ,  H01L21/3065 ,  H01L23/4827 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/6606 ,  H01L29/66143 ,  H01L29/8611 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP2693474A3

公开(公告)日：2014-10-08

申请号：EP13177989.4

申请日：2013-07-25

申请人： IXYS CORPORATION

发明人： Zommer, Nathan

IPC分类号： H01L23/485 ,  H01L23/49 ,  H01L23/488 ,  H01L21/60 ,  H01L23/373 ,  H01L23/495

CPC分类号： H01L23/48 ,  H01L23/3735 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/73 ,  H01L24/80 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L24/95 ,  H01L2224/03312 ,  H01L2224/0345 ,  H01L2224/035 ,  H01L2224/03505 ,  H01L2224/0381 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05076 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05687 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/0589 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/08238 ,  H01L2224/4007 ,  H01L2224/40225 ,  H01L2224/40247 ,  H01L2224/40475 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/73221 ,  H01L2224/73251 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/80439 ,  H01L2224/80895 ,  H01L2224/84205 ,  H01L2224/84424 ,  H01L2224/84801 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85424 ,  H01L2224/92 ,  H01L2224/92157 ,  H01L2224/9222 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/05432 ,  H01L2224/05139 ,  H01L2924/00015 ,  H01L2224/80 ,  H01L2224/84 ,  H01L2224/85 ,  H01L2224/08 ,  H01L2224/40 ,  H01L2224/48 ,  H01L2224/03 ,  H01L2924/207 ,  H01L2224/37099

摘要： A method of manufacturing a semiconductor die, comprising the steps of: (a) forming a plurality of separate amounts of silver nanoparticle paste on a top- side of a wafer (26) such that there is an amount of silver nanoparticle paste on a first aluminum pad (28) and such that there is no silver nanoparticle paste (29) on a second aluminum pad (27); and (b) sintering the amount of silver nanoparticle paste so that the amount of silver nanoparticle paste becomes a sintered silver structure disposed on the first aluminum pad (28) and so that the second aluminum pad (27) is not covered by any sintered silver layer.

公开(公告)号：EP2517239B1

公开(公告)日：2013-10-02

申请号：EP10796036.1

申请日：2010-12-21

申请人： United Monolithic Semiconductors GmbH

发明人： JONSSON, Günter ,  STIEGLAUER, Hermann

IPC分类号： H01L23/00 ,  H01L23/48 ,  H01L23/482

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/4827 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/0231 ,  H01L2224/02371 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/04026 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/0508 ,  H01L2224/051 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05548 ,  H01L2224/05561 ,  H01L2224/05644 ,  H01L2224/291 ,  H01L2224/32221 ,  H01L2224/83101 ,  H01L2224/834 ,  H01L2224/83815 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05552