Abstract:
A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
Abstract:
A printed wiring board has a first substrate (10) with multiple wiring layers, and a second substrate (20) with wiring layers whose conductor density is set higher than that of the first substrate (10). The first substrate (10) and the second substrate (20) are electrically connected through each wiring layer, and the second substrate (20) is embedded in an accommodation section (100a).
Abstract:
A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
Abstract:
In a flex-rigid wiring board (10) having rigid substrates (11, 12) and a flexible substrate (13) that connects the rigid substrates (11, 12) with each other, a folded section made up of bending portions (130a to 130h) is formed in the flexible substrate (13). Then, the flexible substrate (13), including its folded section, is accommodated in a space between the rigid substrates.
Abstract:
One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising installing in said package an array of embedded discrete ceramic capacitors (1600), and optionally planar capacitor layers (1500). A further embodiment provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising using an array of embedded discrete ceramic capacitors with different resonance frequencies, arranged in such a way that the capacitor array's impedance vs frequency curve in the critical mid-frequency range yields impedance values at or below a targeted impedance value.
Abstract:
The present invention is to provide a wiring board where the risk of rupture in the connection between conductive patterns is minimized if electrical continuity inside the through-hole generates high temperatures. A wiring board 10 that has an insulation layer 161a formed with a base material of resin-impregnated inorganic fabric, a base substrate 121 supporting the insulation layer 161a, a via 114a electrically connecting a conductive pattern 117a formed on the insulation layer 161a and a conductive pattern 113a formed on the base substrate 121, and a through-hole 111 penetrating the base substrate. The hole-diameter of the through-hole 111 is in the range of 10 µm-150 µm.
Abstract:
A multi-layer printed circuit board comprising: a core substrate having through holes for connecting the upper and lower surfaces to each other and having a structure that interlayer resin insulating layers and conductor circuits are alternately laminated on said core substrate, wherein through holes having different diameters are formed in said core substrate.
Abstract:
A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.
Abstract:
A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.