Printed circuit board with pins for being connected to electronic part mounted thereon
    22.
    发明公开
    Printed circuit board with pins for being connected to electronic part mounted thereon 有权
    PCB具有接触表面,用于连接到电子部件安装在其上

    公开(公告)号:EP1179971A3

    公开(公告)日:2005-12-07

    申请号:EP01118697.0

    申请日:2001-08-03

    Abstract: Plural pins (3) are arranged on a printed circuit board (1) to form a generally square shape and are electrically connected to terminals of a QFP-IC (2). In the pins (3), a pin disposed at a corner portion of the generally square shape is used as a GND terminal (3a), and a pin adjoining the GND terminal is used as a source terminal (3b). A conductive region (5a) is provided to extend radially from the corner portion, and is electrically connected to the ground terminal (3a). Further, another conductive region (5b) is provided in the generally square shape and is electrically connected to the radial conductive region (5a).

    Abstract translation: 多个销(3)被布置在印刷电路板(1),以形成基因反弹正方形形状,并且电连接到IC QFP(2)的终端。 在销(3),在该基因的反弹正方形形状的角部设置在销被用作GND端子(3a)和一个销邻接GND端子被用作源极端子(3b)的。 导电区(5A)被设置成从该角部径向延伸,并电连接到接地端(3A)。 此外另一个导电区域(5b)的基因中的反弹正方形形状被设置,并电连接到所述径向导电区(5A)。

    Bond pads for fine-pitch applications on air bridge circuit boards
    23.
    发明公开
    Bond pads for fine-pitch applications on air bridge circuit boards 审中-公开
    对于与中途停留的印刷电路板具有细间距应用接触表面

    公开(公告)号:EP1026928A3

    公开(公告)日:2003-02-05

    申请号:EP00300553.5

    申请日:2000-01-26

    Abstract: An etched tri-metal-layer air bridge circuit board specially designed for fine-pitch applications, comprising: an electrically insulative substrate surface (10), a plurality of tri-metal-layer bond pads (12) arranged in a generally straight row on the substrate surface (10) wherein the row defines a width direction therealong, and a circuit trace (20) arranged on the substrate surface (10), wherein the circuit trace (20) runs between two adjacent ones (22) of the plurality of tri-metal-layer bond pads (12). Each bond pad (12) comprises: (1) a bottom layer (14) attached to the substrate surface (10), the bottom layer (14) being made of a first metal and having an overall width W1 as measured along the width direction; (2) a top layer (18) disposed above and generally concentric with the bottom layer (14), the top layer (18) being made of the first metal and having an overall width W2 as measured along the width direction; and (3) a middle layer (16) made of a second metal connecting the bottom layer (14) and the top layer (18). The bond pads (12) are specially shaped such that W2 > W1 for at least the two adjacent bond pads (12), thus enabling the circuit trace (20) to be spaced closely to the bottom layers (14) of the two adjacent bond pads (12), while allowing the top layers (18) of the pads (12) to be made much larger so as to avoid delamination thereof from their associated middle layers (16).

    Multilayer printed-circuit board comprising surface-mounted memories
    25.
    发明公开
    Multilayer printed-circuit board comprising surface-mounted memories 失效
    说话者Mehrschichtige gedruckte Schaltungen mitoberflächenmontiertenSpeichern。

    公开(公告)号:EP0335123A2

    公开(公告)日:1989-10-04

    申请号:EP89103643.6

    申请日:1989-03-02

    Abstract: A multilayer printed circuit memory board is designed and constructed so that the top and bottom layers contain repetitive integrated circuit (IC) chip component hole/pad and interconnection line patterns which are mirror images of one another. The board uses surface mounted techniques in which the integrated chip components of the memory array are mounted and soldered to both sides of the board thereby doubling the density or capacity of the memory board. The integrated circuit memory chips, mounted on the top and bottom of the board, are aligned with each other for sharing common holes or vias in which logically equivalent input signal connections are exchanged in a manner for reducing the number of holes and length of connective wiring.

    Abstract translation: 多层印刷电路存储板被设计和构造成使得顶层和底层包含彼此成像的重复集成电路(IC)芯片组件孔/焊盘和互连线图案。 该板使用表面贴装技术,其中将存储器阵列的集成芯片组件安装并焊接到板的两侧,从而使存储板的密度或容量加倍。 安装在板的顶部和底部的集成电路存储器芯片彼此对准,用于共享公共孔或通孔,其中以减少连接线的孔数和长度的方式交换逻辑等效的输入信号连接 。

    Printed wiring board, printed circuit board, and printed circuit board manufacturing method
    27.
    发明公开
    Printed wiring board, printed circuit board, and printed circuit board manufacturing method 审中-公开
    印刷线路板,印刷电路板和印刷电路板的制造方法

    公开(公告)号:EP2706829A2

    公开(公告)日:2014-03-12

    申请号:EP13179343.2

    申请日:2013-08-06

    Inventor: Ohira, Masaharu

    Abstract: Provided is a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board; the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.

    Abstract translation: 本发明提供一种印刷线路板,该印刷线路板包括放置在其上要安装半导体封装件的一个表面层中的第一散热图案,放置在另一个表面层中的第二散热图案以及放置在内层中的内层导体图案 其中在印刷线路板中形成通孔; 所述第一散热图案具有接合部分,所述接合部分放置在与所述半导体封装的散热器相对的相对区域中并且通过焊料接合到所述散热器; 至少一个通孔被放置在相对区域中; 并且第二散热图案形成为其中表面层侧上的一个通孔中的导体膜的端部分离的图案。

    Semiconductor package
    29.
    发明公开
    Semiconductor package 审中-公开
    半导体封装

    公开(公告)号:EP1255300A3

    公开(公告)日:2006-06-07

    申请号:EP02009036.1

    申请日:2002-04-23

    Inventor: Kei, Murayama

    Abstract: A semiconductor package provided with an interconnection layer including an interconnection pattern and pad formed on an insulating substrate or insulating layer, a protective layer covering the interconnection layer except at the portion of the pad and the insulating substrate or insulating layer, and an external connection terminal bonded with the pad exposed from the protective layer, the pad to which the external connection terminal is bonded being comprised of a plurality of pad segments, sufficient space being opened for passing an interconnection between pad segments, and the pad segments being comprised of at least one pad segment connected to an interconnection and other pad segments not connected to interconnections.

    Abstract translation: 一种半导体封装,其具备:布线层,其形成于绝缘基板或绝缘层上;布线层,其覆盖除了所述焊盘以及绝缘基板或绝缘层的一部分之外的布线层;以及外部连接端子 与从所述保护层露出的所述焊盘接合,所述外部连接端子所接合的所述焊盘由多个焊盘片段组成,所述焊盘片段之间具有足够的空间以通过所述互连,并且所述焊盘片段至少包括 一个焊盘片段连接到互连和其他没有连接到互连的焊盘片段。

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