公开(公告)号：EP0472317B1

公开(公告)日：1995-12-20

申请号：EP91307133.8

申请日：1991-08-02

Applicant: AT&T Corp.

Inventor： Vince, Richard A.

IPC: H05K9/00

CPC classification number: H05K1/0233 ,  H05K1/0224 ,  H05K1/0225 ,  H05K1/0231 ,  H05K2201/086 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/09772 ,  H05K2201/1006 ,  H05K2201/10689

公开(公告)号：EP0614331A3

公开(公告)日：1995-05-10

申请号：EP94301550.3

申请日：1994-03-03

Applicant: International Business Machines Corporation

Inventor： Muyshondt, Jorge Enrique ,  Parker, Gary Arnold ,  Wilkie, Bruce James

IPC: H05K9/00

CPC classification number: H05K9/0039 ,  H05K1/0218 ,  H05K2201/0715 ,  H05K2201/093

Abstract: In a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, a Faraday cage is constructed including a first and a second ground plane disposed in a first and second conductor layer respectively. The ground planes being electrically interconnected at their peripheries, preferably by a plurality of vias. A third conductor layer is disposed between the first and second conductor layers in which a plurality of signal paths are defined. The Faraday cage surrounds a shielded portion of the third conductor layer so that electrical signals conducted through the shielded portion are isolated from electrical noise. The invention finds particular application in a mixed digital/analog board separated into a digital section of the board having a digital ground plane defined in one of the conductor layers and a plurality of digital signal paths defined in another of the conductor layers and an analog section of the board having the Faraday cage and the shielded portion. Thus, the plurality of signal paths in the shielded region are intended for analog signals which are sensitive to digital noise. Additional conductor layers in the analog section can be added inside and outside the Faraday cage. Those analog signal paths located outside the cage are defined for analog signals which are less sensitive than analog signals in the shielded region. The board may be an audio card for a digital computer.

公开(公告)号：EP0525810A1

公开(公告)日：1993-02-03

申请号：EP92113131.4

申请日：1992-07-31

Applicant: Hughes Aircraft Company

Inventor： Hanz, Curtis L. ,  Gulick, Jon J. ,  Virga, Kathleen L. ,  Podell, Allen

IPC: H01L23/66 ,  H01L23/64

CPC classification number: H05K1/0253 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01P5/028 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/0298 ,  H05K2201/0191 ,  H05K2201/093 ,  H05K2201/09727 ,  H05K2201/09845 ,  H05K2201/10689

Abstract: A microstrip transmission line structure a series of connected microstrip strip sections having different widths disposed on an outside layer of a unitized multilayer circuit structure and forming a microstrip line, respective ground planes for each of the strip sections formed between insulating layers of the unitized multilayer circuit structure and respectively spaced from the associated strip sections to provide a substantially constant impedance along the length of the microstrip line, and a plurality of conductive vias for electrically interconnecting the respective ground planes.

Abstract translation: 微带传输线构成具有不同宽度的一系列连接的微带条部分，其布置在单元化多层电路结构的外层上并形成微带线，每个带状部分的接地面形成在单位化多层电路的绝缘层之间 并且与相关联的带状部分分开间隔，以沿着微带线的长度提供基本上恒定的阻抗，以及用于电连接各个接地平面的多个导电通孔。

公开(公告)号：EP0472317A1

公开(公告)日：1992-02-26

申请号：EP91307133.8

申请日：1991-08-02

Applicant: AT&T Corp.

Inventor： Vince, Richard A.

IPC: H05K9/00

CPC classification number: H05K1/0233 ,  H05K1/0224 ,  H05K1/0225 ,  H05K1/0231 ,  H05K2201/086 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/09772 ,  H05K2201/1006 ,  H05K2201/10689

Abstract: Electromagnetic filtering for a VLSI device having multiple power input leads is realized by employing a sub-power plane which is physically separate from a main power distribution system on a circuit board. The sub-power plane is placed directly under a corresponding VLSI device. Decoupling capacitors are connected to the sub-power plane and, in turn, to each of the power input leads on the VLSI device. Power is supplied from the main power distribution system to the sub-power plane via a ferrite bead type filter.

Abstract translation: 具有多个电力输入引线的VLSI装置的电磁滤波是通过采用物理上与电路板上的主配电系统分离的子电源平面实现的。 子电源平面直接放置在相应的VLSI器件的下方。 去耦电容器连接到子电源平面，然后连接到VLSI器件上的每个电源输入引线。 电力通过铁氧体磁珠式过滤器从主配电系统供电到副电力平面。

公开(公告)号：EP3410471A1

公开(公告)日：2018-12-05

申请号：EP17744322.3

申请日：2017-01-26

Applicant: KYOCERA Corporation

Inventor： KITAMURA, Toshihiko

IPC: H01L23/02 ,  H01L23/04 ,  H01L23/12 ,  H01L31/02 ,  H01S5/022

CPC classification number: H05K1/0245 ,  H01L23/02 ,  H01L23/04 ,  H01L23/12 ,  H01L31/02 ,  H01L2224/48091 ,  H01S5/022 ,  H01S5/02212 ,  H01S5/02276 ,  H05K1/024 ,  H05K1/0306 ,  H05K3/1216 ,  H05K2201/068 ,  H05K2201/09154 ,  H05K2201/093 ,  H05K2201/10121 ,  H05K2201/10287 ,  H05K2201/10424 ,  H05K2203/1131 ,  H01L2924/00014

Abstract: A wiring board includes a signal conductor wiring positioned on a first face of a first dielectric layer, and a ground conductor wiring positioned on a second face thereof. A region of the ground conductor wiring where a first end portion of the signal conductor wiring is positioned in plan view is cut away inwardly from a first side of the second face opposing a first side of the first face.

公开(公告)号：EP2912928B1

公开(公告)日：2018-11-21

申请号：EP13735145.8

申请日：2013-06-25

Applicant: Cisco Technology, Inc.

Inventor： SABAVAT, Goutham ,  MOHAMED, Javid ,  RAMANATHAN, Subramanian ,  SCEARCE, Stephen

IPC: H05K1/02

CPC classification number: H05K3/225 ,  G06F17/5036 ,  G06F17/5045 ,  G06F17/5068 ,  H05K1/0224 ,  H05K1/0265 ,  H05K1/0298 ,  H05K2201/093 ,  H05K2201/09681 ,  H05K2201/0969

Abstract: In one implementation, a multilayered printed circuit board is configured to redirect current distribution. The current may be distributed by steering, blocking, or otherwise manipulating current flows. The multilayered printed circuit board includes at least one power plane layer. The power plane layer does not distribute current evenly. Instead, the power plane layer includes multiple patterns with different resistances. The patterns may include a hatching pattern, a grid pattern, a directional pattern, a slot, a void, or a continuous pattern. The pattern is a predetermined spatial variation such that current flows in a first area differently than current flows in a second area.

公开(公告)号：EP3389347A1

公开(公告)日：2018-10-17

申请号：EP18166917.7

申请日：2018-04-12

Applicant: Pegatron Corporation

Inventor： YANG, Ching Ou ,  CHU, Cheng-Hui

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0263 ,  H05K1/0265 ,  H05K1/114 ,  H05K1/116 ,  H05K2201/09254 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09409 ,  H05K2201/09427 ,  H05K2201/09463 ,  H05K2201/09609 ,  H05K2201/09618 ,  H05K2201/0969 ,  H05K2201/09709 ,  H05K2201/0979

Abstract: A power signal transmission structure and a design method are provided. The power supply signal transmission structure is adapted for a circuit board having a first surface and a second surface opposite to the first surface, and the power signal transmission structure includes a first power electrode, a second power electrode, and a plurality of vias. The first power electrode is disposed on the first surface and has a plurality of power pad regions for receiving a power signal. The second power electrode is disposed on the second surface. The vias penetrate the circuit board to electrically connect the first power electrode and the second power electrode. The vias are arranged in accordance with the current direction of the power signal to balance the current received by the vias.

公开(公告)号：EP3379905A1

公开(公告)日：2018-09-26

申请号：EP18162164.0

申请日：2018-03-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHIOZAKI, Ryosuke ,  SUZUKI, Yuto ,  IWAKI, Hideki

IPC: H05K1/02 ,  H01Q21/00 ,  H01Q21/06 ,  H01P1/203 ,  H01P5/02

CPC classification number: H05K1/0251 ,  H01P3/08 ,  H01P5/028 ,  H01Q1/38 ,  H01Q21/0075 ,  H01Q21/065 ,  H05K1/0242 ,  H05K1/0243 ,  H05K1/0248 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09254 ,  H05K2201/093 ,  H05K2201/09327 ,  H05K2201/09727 ,  H05K2201/0979 ,  H05K2201/10098

Abstract: A circuit board includes: a substrate; a first power feed line disposed so as to be close to a plurality of radiating elements provided on a surface of the substrate and to extend in a first direction; a first connection conductor (17) extending in a second direction orthogonal to the first direction, one end of the first connection conductor being connected to the first power feed line substantially at its central portion in the first direction; and a second power feed line (19, 51) that has a first line part (191) extending in a third direction orthogonal to the second direction, the first line part joining to another end of the first connection conductor (17), and also has a second line part (193) branching from the first line part (191), the second line part joining to the other end from a third direction side.

公开(公告)号：EP3355405A1

公开(公告)日：2018-08-01

申请号：EP18151052.0

申请日：2011-05-11

Applicant: Sony Semiconductor Solutions Corporation

Inventor： KIKUCHI, Hidekazu ,  MOGI, Takayuki ,  AKIYAMA, Yoshiyuki ,  KAWAMURA, Hirofumi

IPC: H01P5/107 ,  H01R13/645 ,  H01R24/00 ,  H01R27/00 ,  H05K5/02 ,  H01P3/00 ,  H01P5/00 ,  H01P1/208 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/10 ,  H01P5/18

CPC classification number: H01P5/02 ,  H01P1/208 ,  H01P3/12 ,  H01P3/121 ,  H01P3/165 ,  H01P5/024 ,  H01P5/082 ,  H01P5/087 ,  H01P5/1022 ,  H01P5/107 ,  H01P5/18 ,  H01P5/182 ,  H01P5/188 ,  H01R13/6461 ,  H01R13/665 ,  H01R24/28 ,  H01R24/76 ,  H01R2103/00 ,  H04B3/56 ,  H04B7/24 ,  H05K1/0225 ,  H05K1/0239 ,  H05K2201/093 ,  H05K2201/09672 ,  H05K2201/0969 ,  H05K2201/09754

Abstract: An apparatus for communication with another apparatus including a second waveguide formed on a second dielectric, the apparatus comprising: a coupler including a first waveguide formed on a first dielectric; and a circuit connected to the coupler and configured to convert a baseband signal into a high-frequency signal and a high-frequency signal to a baseband signal, wherein a cross-section of the first waveguide and a cross-section of the second waveguide are communicatively coupled to form a waveguide coupler through which electromagnetic wave communication is performed, the first and second waveguides being surrounded by the first and second dielectrics when communicatively coupled, the first waveguide includes a slot through which an electromagnetic wave passes, and the first waveguide further includes a via through which the electromagnetic wave enters or leaves the slot.

公开(公告)号：EP3226665A1

公开(公告)日：2017-10-04

申请号：EP16305384.6

申请日：2016-03-31

Applicant: Thomson Licensing

Inventor： JEANNE, Ludovic ,  MINARD, Philippe ,  BERTIN, Jean-Pierre ,  LO HINE TONG, Dominique

IPC: H05K1/02

CPC classification number: H05K1/0227 ,  H01Q13/10 ,  H05K2201/093 ,  H05K2201/10015 ,  H05K2201/10098 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2203/171

Abstract: A device comprising a slot resonator (140) etched in a printed circuit board (110) comprising a short-circuit plane (142) and a high impedance plane (144), the high impedance plane being located on the edge of a ground plane of the printed circuit board, between two electronic modules (120, 130) hosted on the printed circuit board, the high impedance plane comprising an active component (150) tuned to optimize the noise level of the electronic modules. The overall length of the etching is equal to the quarter guided wave length modulo the half guided wave length of the frequency to be inhibited.

Abstract translation: 一种包括蚀刻在包括短路平面（142）和高阻抗平面（144）的印刷电路板（110）中的槽谐振器（140）的装置，所述高阻抗平面位于接地层的边缘上 所述印刷电路板位于所述印刷电路板上的两个电子模块（120,130）之间，所述高阻抗平面包括经调谐以优化所述电子模块的噪声水平的有源部件（150）。 蚀刻的总长度等于四分之一波导模长度被模抑制的频率的半波导波长。