公开(公告)号：EP3167484A4

公开(公告)日：2017-10-18

申请号：EP14870668

申请日：2014-07-07

Applicant: INTEL IP CORP

Inventor： MEYER THORSTEN ,  OFNER GERALD

IPC: H01L25/065 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/54 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/3178 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/065 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15321 ,  H01L2924/1533 ,  H01L2924/15331 ,  H05K2201/10515 ,  H01L2924/00014 ,  H01L2924/014

公开(公告)号：EP3067929A3

公开(公告)日：2016-11-23

申请号：EP16157770.5

申请日：2016-02-29

Applicant: MediaTek, Inc

Inventor： LIN, Tzu-Hung ,  HSIAO, Ching-Wen ,  PENG, I-Hsuan

IPC: H01L25/16

CPC classification number: H01L25/0657 ,  H01L21/568 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32265 ,  H01L2224/73204 ,  H01L2224/73209 ,  H01L2224/92133 ,  H01L2225/06513 ,  H01L2225/06558 ,  H01L2225/06586 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/014

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a semiconductor die (300). A first molding compound (360) covers a back surface of the semiconductor die. A redistribution layer (RDL) structure (350a) is disposed on a front surface of the semiconductor die. The semiconductor die is coupled to the RDL structure. A second molding compound (320) is disposed on the front surface of the semiconductor die and embedded in the RDL structure. A passive device (330) is disposed on the second molding compound and coupled to the semiconductor die.

Abstract translation: 本发明提供了一种半导体封装组件。 该半导体封装组件包括半导体管芯（300）。 第一模塑料（360）覆盖半导体管芯的后表面。 再分布层（RDL）结构（350a）设置在半导体管芯的前表面上。 半导体管芯耦合到RDL结构。 第二模塑料（320）设置在半导体管芯的前表面上并嵌入RDL结构中。 无源器件（330）设置在第二模塑料上并耦合到半导体管芯。

公开(公告)号：EP2937900A3

公开(公告)日：2016-01-06

申请号：EP15001129.4

申请日：2015-04-17

Applicant: Broadcom Corporation

Inventor： Law, Edward ,  Khan, Rezaur ,  Hu, Kunzhong

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L25/10 ,  H01L25/03 ,  H01L25/065 ,  H01L23/552 ,  H01L23/29 ,  H01L21/98

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L21/561 ,  H01L21/566 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Reconstitution techniques for semiconductor packages are provided. One reconstitution technique is used to encapsulate (348) a plurality of semiconductor packages (336,354,356) into a single multi-chip module (fig. 3e). Solder balls (326) coupled to each package may be partially exposed after reconstitution, which enables the packages to be coupled to another device. Another reconstitution technique is used to couple a plurality of semiconductor packages into a package-on-package module using self-alignment feature(s) (fig. 6k). The self-alignment feature(s) are exposed solder ball(s) (626) that are included in the bottom package of the package-on-package module. The exposed solder ball(s) serve as a frame of reference to other solder balls (624) that are encapsulated by an encapsulation material (634). After the location of these other solders balls are determined, through-mold vias (636a,636b) may be formed in the encapsulation material at locations corresponding to the other solder balls. The top package of the package-on-package module may then be coupled to the bottom package using these solder balls.

公开(公告)号：EP2880684A1

公开(公告)日：2015-06-10

申请号：EP13748197.4

申请日：2013-07-31

Applicant: Invensas Corporation

Inventor： MOHAMMED, Ilyas

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/91 ,  H01L24/92 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0233 ,  H01L2224/02371 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/24011 ,  H01L2224/24147 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/83855 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/00014 ,  H05K3/4661 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic package includes first and second encapsulated microelectronic elements, each of which includes a semiconductor die having a front face and contacts thereon. An encapsulant contacts at least an edge surface of each semiconductor die and extends in at least one lateral direction therefrom. Electrically conductive elements extend from the contacts and over the front face to locations overlying the encapsulant. The first and second microelectronic elements are affixed to one another such that one of the front or back surfaces of one of the first and second semiconductor dies is oriented towards one of the front or back surfaces of the other of the first and second semiconductor dies. A plurality of electrically conductive interconnects extend through the encapsulants of the first and second microelectronic elements and are electrically connected with at least one semiconductor die of the first and second microelectronic elements by the conductive elements.

Abstract translation: 微电子封装包括第一和第二封装的微电子元件，每个元件包括具有正面和与其接触的半导体管芯。 密封剂与每个半导体管芯的至少边缘表面相接触，并沿其至少一个横向延伸。 导电元件从触头延伸并且在正面上延伸到覆盖密封剂的位置。 第一和第二微电子元件彼此固定，使得第一和第二半导体管芯之一的前表面或后表面中的一个朝向第一和第二半导体管芯中另一个的前表面或后表面中的一个。 多个导电互连延伸穿过第一和第二微电子元件的密封剂并且通过导电元件与第一和第二微电子元件的至少一个半导体管芯电连接。

公开(公告)号：EP2769411A1

公开(公告)日：2014-08-27

申请号：EP12787211.7

申请日：2012-10-16

Applicant: Invensas Corporation

Inventor： CHAU, Ellis ,  CO, Reynaldo ,  ALATORRE, Roseann ,  DAMBERG, Philip ,  WANG, Wei-shun ,  YANG, Se, Young ,  ZHAO, Zhijun

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 90° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

Abstract translation: 微电子封装可以包括引线键合，其具有结合到在衬底的表面上暴露的导电元件的相应导体的基底。 线接合可以具有相对于基部以25°至90°之间的角度设置的外部边缘表面，并且远离基部远离，例如相对，并远离连接到基座的端部。 电介质封装层从衬底延伸并覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分离，其中引线键合的未封装部分由引线键的部分限定， 被封装层未覆盖，未包封的部分包括引线的端部。

公开(公告)号：EP2764549A2

公开(公告)日：2014-08-13

申请号：EP12791307.7

申请日：2012-09-26

Applicant: Invensas Corporation

Inventor： CRISP, Richard, Dewitt ,  ZOHNI, Wael ,  HABA, Belgacem ,  LAMBRECHT, Frank

IPC: H01L25/065 ,  H01L23/49 ,  H01L23/13 ,  G11C5/02 ,  G11C5/06 ,  H01L25/10

CPC classification number: G11C5/02 ,  G11C5/04 ,  G11C5/063 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49113 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A microelectronic element (101) having memory storage array function has a front face (105) facing away from a substrate (102) of a microelectronic package (100), and is electrically connected with the substrate (102) through conductive structure (112) extending above the front face (105). First and second sets (114, 124) of first terminals are exposed at a surface (110) of the substrate (102) on respective first and second sides of a theoretical axis (132), each set configured to carry address information usable to determine an addressable memory location of a memory storage array of the microelectronic element. Signal assignments of the first terminals in the first set are a mirror image of the signal assignments of the first terminals in the second set.

Abstract translation: 具有存储器存储阵列功能的微电子元件（101）具有从微电子封装（100）的衬底（102）的面向远离前表面（105），并且电通过导电结构（112）的基板连接上述延伸 前表面（105）。 第一端子（104），在第一和第二组（114，124）上的理论轴线（132）的respectivement第一和第二相对侧上设置在位置被布置。 各组的第一端子被配置成携带可用于微电子元件的存储器storageArray的可寻址存储器位置的确定性矿地址信息。 在所述第一组（114）所述第一终端具有信号分配哪些是所述第一终端的所述第二组（124）的信号分配的镜像。

公开(公告)号：EP1667227A4

公开(公告)日：2011-08-03

申请号：EP05703870

申请日：2005-01-20

Applicant: PANASONIC CORP

Inventor： NAKATANI SEIICHI ,  MITANI TSUTOMU

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/66 ,  H01L25/04 ,  H01L25/065 ,  H01L25/10 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/02 ,  H01L23/3128 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H05K1/181 ,  H05K2201/10098 ,  H05K2201/1053 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A module that can not only achieve the reduction in size and manufacturing cost but also be impervious to noise due to electromagnetic waves, and a mounted structure using the same are provided. A module (1) includes a substrate (12) and a plurality of semiconductor packages (11a, 11b), each including a semiconductor chip (10), mounted on the substrate (12). Each of the plurality of semiconductor packages (11a, 11b) includes a first radio communication element (16) for transmitting and receiving a signal between the semiconductor chips (10) in the plurality of semiconductor packages (11a, 11b) by radio communication, and the first radio communication element (16) is constituted independently of the semiconductor chip (10).

Abstract translation: 提供了一种不仅可以实现尺寸和制造成本的降低，而且还可以防止由于电磁波而产生的噪声的模块，并且提供了使用其的安装结构。 模块（1）包括基板（12）和多个半导体封装（11a，11b），每个半导体封装包括安装在基板（12）上的半导体芯片（10）。 多个半导体封装（11a，11b）中的每一个包括用于通过无线电通信在多个半导体封装（11a，11b）中的半导体芯片（10）之间发送和接收信号的第一无线电通信元件（16），以及 第一无线电通信元件（16）独立于半导体芯片（10）构成。

公开(公告)号：EP2259309A2

公开(公告)日：2010-12-08

申请号：EP10163988.8

申请日：2010-05-26

Applicant: Honeywell International Inc.

Inventor： Scheid, David ,  Jensen, Ronald James

IPC: H01L23/367

CPC classification number: H01L23/3675 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15155 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An integrated circuit package includes a thermally and electrically conductive package lid. The package lid may be in electrical communication with an electrically conductive pad connected to a power plane, ground plane, or signal route in the integrated circuit. The electrically conductive package lid may provide an electrical connection for electrical power or electrical signals or may serve as an electrical ground. In some embodiments, the package lid may include a thermally and electrically conductive material. In other embodiments, the package lid may include an electrically insulative substrate coated on at least one surface with a layer of metal or another conductive material. The conductive layer may be electrically connected to electrical ground, a reference voltage, or a signal pay by at least one electrically conductive via.

Abstract translation: 一种集成电路封装包括导热和导电封装盖。 封装盖可与电连接到电源的导电垫，接地平面，或在集成电路信号路径的平面电连通。 导电包盖可以提供关于用于电功率或电信号的电连接，或者可以用作在电接地。 在一些实施例中，封装盖可以包括一个导热和导电材料。 在其它实施例中，封装盖可以包括在涂覆至少一个表面上的金属层或其它导电材料电绝缘的衬底。 该导电层可以电连接到电气接地，参考电压，或通过至少一个导电通孔的信号的报酬。

公开(公告)号：EP2102867A2

公开(公告)日：2009-09-23

申请号：EP07865620.4

申请日：2007-12-13

Applicant: Rambus, Inc.

Inventor： BEST, Scott ,  LI, Ming

IPC: G11C5/02

CPC classification number: G11C11/4093 ,  G11C5/02 ,  G11C5/025 ,  G11C5/04 ,  G11C11/4096 ,  H01L23/481 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An integrated circuit (IC) package includes an interface die and a separate storage die. The interface die has a synchronous interface to receive memory access commands from an external memory controller, and has a plurality of clockless memory control interfaces to output row and column control signals that correspond to the memory access commands. The storage die has a plurality of independently accessible storage arrays and corresponding access-control interfaces to receive the row and column control signals from the clockless memory control interfaces, each of the access-control interfaces including data output circuitry to output read data corresponding to a given one of the memory access commands in a time-multiplexed transmission.

公开(公告)号：EP1401020A4

公开(公告)日：2007-12-19

申请号：EP02714493

申请日：2002-04-05

Applicant: RENESAS TECH CORP

Inventor： KADO Y ,  NAITO T ,  SATO T ,  IKEGAMI H ,  KIKUCHI T

IPC: H01L23/31 ,  H01L23/50 ,  H01L23/538 ,  H01L25/065 ,  H01L25/04

CPC classification number: H01L24/14 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06558 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract translation: 在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片 （2B），其上形成有闪存，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙， （2B）和封装基板（1）的主表面填充有未填充树脂（6）。 其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过金线（8）电连接到封装衬底（1）的焊盘（9）。