公开(公告)号：US12249514B2

公开(公告)日：2025-03-11

申请号：US17439748

申请日：2020-03-16

Applicant: Lam Research Corporation

Inventor： Jon Henri ,  Karthik S. Colinjivadi ,  Francis Sloan Roberts ,  Kapu Sirish Reddy ,  Samantha Siamhwa Tan ,  Shih-Ked Lee ,  Eric Hudson ,  Todd Shroeder ,  Jialing Yang ,  Huifeng Zheng

IPC: H01L21/311 ,  H01J37/32 ,  H01L21/02

Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.

公开(公告)号：US20250054751A1

公开(公告)日：2025-02-13

申请号：US18720153

申请日：2022-12-15

Applicant: Lam Research Corporation

Inventor： Awnish Gupta ,  Bart J. Van Schravendijk ,  Aaron Blake Miller ,  Jon Henri

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455

Abstract: The present disclosure relates to methods, systems, and apparatuses for depositing films. In particular, a film is deposited using an atomic layer deposition process where some steps of the ALD process are performed at a temperature above a pyrolysis temperature of a film precursor.

公开(公告)号：US20240410053A1

公开(公告)日：2024-12-12

申请号：US18721457

申请日：2022-12-19

Applicant: Lam Research Corporation

Inventor： Awnish Gupta ,  Bart J. van Schravendijk ,  Jon Henri ,  Fengyan Wei ,  Oksana Savchak ,  Easwar Srinivasan

IPC: C23C16/455 ,  C23C16/40 ,  C23C16/44 ,  C23C16/52 ,  C23C16/56

Abstract: Methods and apparatus for forming silicon oxide using chlorosilane and aminosilane precursors are provided herein.

公开(公告)号：US11869770B2

公开(公告)日：2024-01-09

申请号：US17389301

申请日：2021-07-29

Applicant: Lam Research Corporation

Inventor： Nagraj Shankar ,  Kapu Sirish Reddy ,  Jon Henri ,  Pengyi Zhang ,  Elham Mohimi ,  Bhavin Jariwala ,  Arpan Pravin Mahorowala

IPC: H01L21/033 ,  H01L21/02 ,  C23C16/455 ,  H01L21/308 ,  H01L21/311 ,  C23C16/40 ,  H01L21/027 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/67 ,  C23F1/08

CPC classification number: H01L21/0337 ,  C23C16/401 ,  C23C16/403 ,  C23C16/45536 ,  C23C16/45544 ,  H01L21/0228 ,  H01L21/0273 ,  H01L21/02115 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/30604 ,  H01L21/31058 ,  H01L21/31122 ,  H01L21/31144 ,  C23F1/08 ,  H01L21/67069

Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.

公开(公告)号：US11094542B2

公开(公告)日：2021-08-17

申请号：US16744022

申请日：2020-01-15

Applicant: Lam Research Corporation

Inventor： Nagraj Shankar ,  Kapu Sirish Reddy ,  Jon Henri ,  Pengyi Zhang ,  Elham Mohimi ,  Bhavin Jariwala ,  Arpan Pravin Mahorowala

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/67 ,  H01L21/02 ,  C23C16/455 ,  C23C16/40 ,  H01L21/027 ,  H01L21/308 ,  C23F1/08

Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.

公开(公告)号：US10020188B2

公开(公告)日：2018-07-10

申请号：US15817579

申请日：2017-11-20

Applicant: LAM RESEARCH CORPORATION

Inventor： James S. Sims ,  Jon Henri ,  Ramesh Chandrasekharan ,  Andrew John McKerrow ,  Seshasayee Varadarajan ,  Kathryn Merced Kelchner

IPC: H01L21/02 ,  H01J37/32 ,  C23C16/455 ,  C23C16/50 ,  C23C16/34 ,  C23C16/02

CPC classification number: H01L21/0228 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/4554 ,  C23C16/50 ,  H01J37/32082 ,  H01J37/32467 ,  H01J37/32513 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32715 ,  H01J37/32862 ,  H01J2237/3321 ,  H01J2237/335 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274

Abstract: A method of depositing ALD films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma such that aluminum-rich byproducts are formed on the ceramic surfaces, (b) depositing a conformal halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces so as to cover the aluminum-rich byproducts, (c) depositing a pre-coating on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film on the semiconductor substrate supported on the ceramic surface of the pedestal.

公开(公告)号：US09214333B1

公开(公告)日：2015-12-15

申请号：US14494914

申请日：2014-09-24

Applicant: Lam Research Corporation

Inventor： James S. Sims ,  Kathryn M. Kelchner ,  Jon Henri ,  Dennis M. Hausmann

IPC: H01L21/31 ,  H01L21/02 ,  C23C16/455 ,  C23C16/52

CPC classification number: H01L21/0217 ,  C23C16/345 ,  C23C16/45536 ,  C23C16/52 ,  C23C16/56 ,  H01L21/0228 ,  H01L21/0234

Abstract: Disclosed herein are methods of depositing a SiN film having a reduced wet etch rate. The methods may include adsorbing a film precursor comprising Si onto a semiconductor substrate in a processing chamber to form an adsorption-limited layer of precursor, and then removing unadsorbed precursor from the volume surrounding the adsorbed precursor. The adsorbed precursor may then be reacted by exposing it to a plasma comprising N-containing ions and/or radicals to form a SiN film layer on the substrate, and the SiN film layer may then be densified by exposing it to a He plasma. The foregoing steps may then be repeated to form another densified SiN film layer on the substrate. Also disclosed herein are apparatuses for depositing SiN films having reduced wet etch rates on semiconductor substrates which employ the foregoing techniques.

Abstract translation: 本文公开了沉积具有降低的湿蚀刻速率的SiN膜的方法。 所述方法可以包括在处理室中将包含Si的膜前体吸附到半导体衬底上以形成前体的吸附限制层，然后从包围吸附的前体的体积中除去未吸附的前体。 然后可以通过将吸附的前体暴露于含有N的离子和/或自由基的等离子体以在衬底上形成SiN膜层而使其吸收的前体发生反应，然后可以通过将SiN膜层暴露于He等离子体来致密化SiN膜层。 然后可以重复上述步骤以在衬底上形成另一致密的SiN膜层。 本文还公开了用于在采用上述技术的半导体衬底上沉积具有降低的湿蚀刻速率的SiN膜的装置。

公开(公告)号：US20250014890A1

公开(公告)日：2025-01-09

申请号：US18709780

申请日：2022-11-30

Applicant: Lam Research Corporation

Inventor： Awnish Gupta ,  Bart J. Van Schravendijk ,  Jon Henri ,  Oksana Savchak ,  Fengyan Wei ,  Easwar Srinivasan ,  Dustin Zachary Austin

IPC: H01L21/02 ,  C07F7/18 ,  C23C16/34 ,  C23C16/455

Abstract: The present disclosure relates to methods for providing a silicon nitride film. In particular, the film can be a carbon-doped, silicon nitride film. Methods can include depositing a doped silicon nitride and then plasma treating the doped silicon nitride to provide a conformal film.

公开(公告)号：US20200227260A1

公开(公告)日：2020-07-16

申请号：US16835112

申请日：2020-03-30

Applicant: Lam Research Corporation

Inventor： David Charles Smith ,  Jon Henri ,  Dennis M. Hausmann ,  Paul C. Lemaire

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/3105 ,  H01J37/32 ,  C23C16/04 ,  C23C16/24 ,  C23C16/32 ,  C23C16/36 ,  C23C16/52

Abstract: Methods and apparatuses for selectively growing metal-containing hard masks are provided herein. Methods include providing a substrate having a pattern of spaced apart features, each feature having a top horizontal surface, filling spaces between the spaced apart features with carbon-containing material to form a planar surface having the top horizontal surfaces of the features and carbon-containing material, selectively depositing a metal-containing hard mask on the top horizontal surfaces of the features relative to the carbon-containing material, and selectively removing the carbon-containing material relative to the metal-containing hard mask and features.

公开(公告)号：US10566194B2

公开(公告)日：2020-02-18

申请号：US15972918

申请日：2018-05-07

Applicant: Lam Research Corporation

Inventor： Nagraj Shankar ,  Kapu Sirish Reddy ,  Jon Henri ,  Pengyi Zhang ,  Elham Mohimi ,  Bhavin Jariwala ,  Arpan Pravin Mahorowala

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/02 ,  C23C16/455 ,  H01L21/67 ,  C23F1/08

Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.