-
公开(公告)号：US09601466B2
公开(公告)日：2017-03-21
申请号：US14725268
申请日：2015-05-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongwon Yoon , Boin Noh , Baikwoo Lee , Hyunsuk Chun
IPC: H01L23/02 , H01L25/065 , H01L23/00 , H01L23/498 , H01L25/00
CPC classification number: H01L25/0657 , H01L23/49827 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05573 , H01L2224/05611 , H01L2224/05623 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2224/05669 , H01L2224/0567 , H01L2224/0568 , H01L2224/05681 , H01L2224/05684 , H01L2224/06181 , H01L2224/11334 , H01L2224/11436 , H01L2224/1145 , H01L2224/1146 , H01L2224/13018 , H01L2224/13076 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13123 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1316 , H01L2224/13163 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/1318 , H01L2224/13181 , H01L2224/13184 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/81191 , H01L2224/81205 , H01L2224/818 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06572 , H01L2225/06589 , H01L2924/01004 , H01L2924/01014 , H01L2924/01032 , H01L2924/15311 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2224/05618
Abstract: Provided is a semiconductor package and a method of making same, including a first package substrate; a first semiconductor chip mounted on the first package substrate and having a first pad and a second pad, wherein the first pad is provided on a top of the first semiconductor chip and the second pad is provided on a bottom of the first semiconductor chip, the bottom being an opposite surface of the top; and a clad metal provided on the first pad and electrically connecting the first semiconductor chip to one of a second semiconductor chip and second package substrate provided on the top of the first semiconductor chip.
-
公开(公告)号：US20160071824A1
公开(公告)日：2016-03-10
申请号：US14725268
申请日：2015-05-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongwon Yoon , Boin Noh , Baikwoo Lee , Hyunsuk Chun
IPC: H01L25/065 , H01L23/00 , H01L23/498
CPC classification number: H01L25/0657 , H01L23/49827 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05573 , H01L2224/05611 , H01L2224/05623 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2224/05669 , H01L2224/0567 , H01L2224/0568 , H01L2224/05681 , H01L2224/05684 , H01L2224/06181 , H01L2224/11334 , H01L2224/11436 , H01L2224/1145 , H01L2224/1146 , H01L2224/13018 , H01L2224/13076 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13123 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1316 , H01L2224/13163 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/1318 , H01L2224/13181 , H01L2224/13184 , H01L2224/16145 , H01L2224/16146 , H01L2224/16227 , H01L2224/81191 , H01L2224/81205 , H01L2224/818 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06572 , H01L2225/06589 , H01L2924/01004 , H01L2924/01014 , H01L2924/01032 , H01L2924/15311 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2224/05618
Abstract: Provided is a semiconductor package and a method of making same, including a first package substrate; a first semiconductor chip mounted on the first package substrate and having a first pad and a second pad, wherein the first pad is provided on a top of the first semiconductor chip and the second pad is provided on a bottom of the first semiconductor chip, the bottom being an opposite surface of the top; and a clad metal provided on the first pad and electrically connecting the first semiconductor chip to one of a second semiconductor chip and second package substrate provided on the top of the first semiconductor chip.
Abstract translation: 提供一种半导体封装及其制造方法，包括第一封装衬底; 安装在第一封装基板上并具有第一焊盘和第二焊盘的第一半导体芯片，其中第一焊盘设置在第一半导体芯片的顶部上，第二焊盘设置在第一半导体芯片的底部， 底部是顶部的相对表面; 以及设置在所述第一焊盘上并且将所述第一半导体芯片电连接到设置在所述第一半导体芯片的顶部上的第二半导体芯片和第二封装基板中的一个的复合金属。
-
公开(公告)号：US09402315B2
公开(公告)日：2016-07-26
申请号：US14457493
申请日：2014-08-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyunsuk Chun , Soojae Park , Seungbae Lee , Sangsu Ha
IPC: H05K1/18 , H05K1/11 , H01L23/522 , H01L25/065 , H01L23/00 , H01L25/10 , H01L25/00
CPC classification number: H05K1/18 , H01L23/5226 , H01L23/562 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/10135 , H01L2224/10165 , H01L2224/13014 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/81121 , H01L2224/81141 , H01L2224/81815 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/15311 , H01L2924/15312 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H05K1/11 , H01L2924/00012 , H01L2924/00 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: Provided is a semiconductor package including a wiring substrate having top and bottom surfaces. A first semiconductor chip is disposed on the wiring substrate in a flip-chip manner. The first semiconductor chip has a first surface facing the top surface of the wiring substrate and a second surface opposite to the first surface. First connection members are disposed between the wiring substrate and the first semiconductor chip. The first connection members include first and second contact members each including one or more magnetic materials. The first contact members include portions disposed in the second contact members. The one or more magnetic material of the first contact members have an opposite polar orientation to that of the second contact members.
Abstract translation: 提供一种包括具有顶表面和底表面的布线基板的半导体封装。 第一半导体芯片以倒装芯片的方式设置在布线基板上。 第一半导体芯片具有面对布线基板的上表面的第一表面和与第一表面相对的第二表面。 第一连接构件设置在布线基板和第一半导体芯片之间。 第一连接构件包括每个包括一个或多个磁性材料的第一和第二接触构件。 第一接触构件包括设置在第二接触构件中的部分。 第一接触构件的一个或多个磁性材料具有与第二接触构件相反的极性取向。
-
公开(公告)号：US09397052B2
公开(公告)日：2016-07-19
申请号：US14291698
申请日：2014-05-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Soojae Park , Hyunsuk Chun
CPC classification number: H01L23/562 , H01L23/16 , H01L23/3121 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05009 , H01L2224/06135 , H01L2224/06181 , H01L2224/13025 , H01L2224/131 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/92125 , H01L2224/92247 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2225/06568 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package includes a package substrate, a first semiconductor chip mounted on the package substrate, a second semiconductor chip mounted on the first semiconductor chip to expose at least a portion of the first semiconductor chip, and a stress-relieving structure provided at an edge of the first semiconductor chip and configured to relieve stress applied between the first semiconductor chip and the second semiconductor chip.
Abstract translation: 半导体封装包括封装基板，安装在封装基板上的第一半导体芯片，安装在第一半导体芯片上以暴露第一半导体芯片的至少一部分的第二半导体芯片，以及设置在边缘的应力消除结构 并且被配置为减轻施加在第一半导体芯片和第二半导体芯片之间的应力。
-
-
-
Search Results
4
records
(took 0.014 seconds)
