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    Device and method of manufacture of an interconnection structure for printed circuit boards
    4.
    发明申请
    Device and method of manufacture of an interconnection structure for printed circuit boards 审中-公开
    用于印刷电路板的互连结构的制造装置和方法

    公开(公告)号：US20050286238A1

    公开(公告)日：2005-12-29

    申请号：US10875964

    申请日：2004-06-24

    Applicant: Stephen Joy

    Inventor： Stephen Joy

    IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/40

    CPC classification number: H05K1/184 ,  H05K3/308 ,  H05K3/3447 ,  H05K3/4046 ,  H05K2201/092 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10242 ,  H05K2201/10303 ,  H05K2201/1059 ,  H05K2201/1081 ,  H05K2201/10893 ,  H05K2203/1115 ,  H05K2203/1189

    Abstract: An interconnection structure for coupling conductive layers of a circuit board includes a pin configured to be press-fitted in an aperture traversing the circuit board, to electrically couple the conductive traces. The pin may be placed in a predrilled aperture, or driven into the circuit board, forming the aperture thereby. The pin may also be configured as a punch, removing a plug of material as it is driven therethrough. The pin may comprise a capacitive or resistive region configured to capacitively or resistively couple the first and second traces. The pin may be configured such that capacitive or resistive values are selectable according to a depth to which the pin is positioned in the aperture. The pin may serve as an offset post for mounting the circuit board to a chassis. In such a case, the pin may be provided with a longitudinal aperture configured to receive a threaded screw.

    Abstract translation: 用于耦合电路板的导电层的互连结构包括被配置成压配合在穿过电路板的孔中的引脚，用于电连接导电迹线。 销可以放置在预钻孔中，或者被驱动到电路板中，从而形成孔。 该销还可以被配置为冲头，当其被驱动通过其时移除材料塞。 引脚可以包括被配置为电容地或电阻地耦合第一和第二迹线的电容或电阻区域。 引脚可以被配置为使得电容或电阻值可根据销定位在孔中的深度来选择。 该引脚可以用作将电路板安装到底盘的偏移柱。 在这种情况下，销可以设置有构造成接收螺纹螺钉的纵向孔。

    Multi-path via interconnection structures and methods for manufacturing the same
    5.
    发明授权
    Multi-path via interconnection structures and methods for manufacturing the same 有权
    通过互连结构的多路径及其制造方法

    公开(公告)号：US06891272B1

    公开(公告)日：2005-05-10

    申请号：US10632730

    申请日：2003-07-31

    Applicant: Joseph C. Fjelstad ,  Belgacem Haba

    Inventor： Joseph C. Fjelstad ,  Belgacem Haba

    IPC: H01L23/498 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42 ,  H01L23/48

    CPC classification number: H05K1/115 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/0047 ,  H05K3/403 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09645 ,  H05K2201/10893 ,  H05K2203/1476 ,  H01L2924/00

    Abstract: A multilayered circuit component includes one or more substrates. A first surface of one of the substrates includes circuit paths and other current carrying elements. A second surface of the same or another substrate also includes circuit paths and other current carrying elements. An aperture extends through at least a portion of the one or more substrates. The aperture is defined by a first opening on the first surface, a second opening on the second surface, and an internal surface of the one or more substrates that extends between the first surface and the second surface. A first trace element is provided over a portion of the internal surface of the aperture to extend between the first surface and the second surface. The first trace element extends onto the first surface to form a first partial perimeter of the first opening. A second trace element is provided over a portion of the internal surface of the aperture to extend between the first surface and the second surface. The second trace element extends onto the first surface to form a second partial perimeter of the first opening.

    Abstract translation: 多层电路部件包括一个或多个基板。 一个基板的第一表面包括电路路径和其它载流元件。 相同或另一基板的第二表面还包括电路路径和其它载流元件。 孔径延伸穿过所述一个或多个基底的至少一部分。 孔由第一表面上的第一开口，第二表面上的第二开口以及在第一表面和第二表面之间延伸的一个或多个基底的内表面限定。 第一微量元件设置在孔的内表面的一部分上以在第一表面和第二表面之间延伸。 第一微量元件延伸到第一表面上以形成第一开口的第一部分周长。 第二微量元件设置在孔的内表面的一部分上以在第一表面和第二表面之间延伸。 第二微量元件延伸到第一表面上以形成第一开口的第二部分周界。

    Grouped element transmission channel link termination assemblies
    6.
    发明申请
    Grouped element transmission channel link termination assemblies 有权
    分组元件传输通道链接端接组件

    公开(公告)号：US20030181104A1

    公开(公告)日：2003-09-25

    申请号：US10331712

    申请日：2002-12-30

    Inventor： David L. Brunker ,  Daniel L. Dawiedczyk ,  John E. Lopata ,  Arindum Dutta

    IPC: H01R024/00

    CPC classification number: H05K1/024 ,  H01P3/02 ,  H01R12/716 ,  H01R12/79 ,  H01R13/658 ,  H05K1/0284 ,  H05K1/145 ,  H05K3/107 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09236 ,  H05K2201/09645 ,  H05K2201/09981 ,  H05K2201/10189 ,  H05K2201/10893

    Abstract: Termination assemblies for terminating high-frequency data signal transmission lines include housings with one or more cavities that receive ends of the transmission line therein. The transmission line typically includes a dielectric body and a plurality of conductive elements disposed thereon, with the plurality of conductive elements being arranged in pairs for differential signal transmission. The termination assemblies, in one embodiment include hollow end caps that are formed from a dielectric and which have one or more conductive contacts or plated surfaces disposed on or within the cavity so that they will frictionally mate with the conductive traces on the transmission line. In another embodiment, a connector housing is provided with a center slot and a plurality of dual loop contacts to provide redundant circuit paths and low inductance to the termination assembly. A coupling element may be utilized in the slot to achieve a desired level of coupling between the termination contacts.

    Abstract translation: 用于终止高频数据信号传输线路的终端组件包括具有一个或多个腔体的壳体，该腔体容纳传输线路的端部。 传输线通常包括绝缘体和设置在其上的多个导电元件，多个导电元件成对布置以用于差分信号传输。 终端组件在一个实施例中包括由电介质形成并且具有一个或多个导电触点或设置在空腔中或腔内的电镀表面的空心端盖，使得它们将与传输线上的导电迹线摩擦配合。 在另一个实施例中，连接器壳体设置有中心狭槽和多个双环触点，以向终端组件提供冗余电路路径和低电感。 可以在槽中使用耦合元件以实现端接触点之间期望的耦合水平。

    Multi-connection via with electrically isolated segments
    7.
    发明授权
    Multi-connection via with electrically isolated segments 失效
    多连接通过电隔离段

    公开(公告)号：US06388208B1

    公开(公告)日：2002-05-14

    申请号：US09360002

    申请日：1999-07-23

    Applicant: Sepehr Kiani ,  Mikhail Khusid

    Inventor： Sepehr Kiani ,  Mikhail Khusid

    IPC: H01R909

    CPC classification number: H05K1/0222 ,  H01R12/523 ,  H05K1/112 ,  H05K1/115 ,  H05K3/043 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/403 ,  H05K3/429 ,  H05K2201/09645 ,  H05K2201/1059 ,  H05K2201/10856 ,  H05K2201/10893 ,  H05K2201/10969 ,  H05K2203/0455

    Abstract: An interconnection circuit and related techniques are described. The interconnection circuit includes a plated through hole having a plurality of electrically isolated segments with at least one of the plurality of electrically isolated segments coupled to a signal path and at least one of the electrically isolated segments coupled to ground. With this arrangement, the circuit provides a signal path between a first and a second different layers of a multilayer. By providing one segment as a signal segment and another segment as a ground segment the size and shape of the electrically isolated segments can be selected to provide the interconnection circuit having a predetermined impedance characteristic. The interconnection circuit can thus be impedance matched to circuit board circuits, devices and transmission lines, such as striplines, microstrips and co-planar waveguides. This results in an interconnection circuit which maintains the integrity of relatively high-frequency signals propagating through the interconnection circuit from the first layer to the second layer. The interconnect circuits can be formed by creating distinct conductor paths within the cylindrical plated through-holes using variety of manufacturing techniques including, but not limited to, broaching techniques, electrostatic discharge milling (EDM) techniques and laser etching techniques.

    Abstract translation: 描述了互连电路及相关技术。 互连电路包括具有多个电隔离段的电镀通孔，其中多个电隔离段中的至少一个耦合到信号路径以及耦合到地的电隔离段中的至少一个。 利用这种布置，电路提供了多层的第一和第二不同层之间的信号路径。 通过将一个段作为信号段，另一个段作为接地段，可以选择电隔离段的大小和形状，以提供具有预定阻抗特性的互连电路。 因此，互连电路可以与电路板电路，器件和传输线（例如带状线，微带和共面波导）阻抗匹配。 这导致互连电路，其维持通过互连电路从第一层传播到第二层的相对高频信号的完整性。 互连电路可以通过使用各种制造技术（包括但不限于拉削技术，静电放电铣削（EDM）技术和激光蚀刻技术）在圆柱形电镀通孔内产生不同的导体路径来形成。

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