摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
A wafer transporting apparatus comprising at least one carrier for supporting a substantially circular thin wafer having a flat plane, the carrier including a supporting base for supporting the wafer thereon, and a electrostatic chuck provided in the supporting base and having a contacting surface which face-wise contacts the flat plane of the wafer supported on the supporting base. The electrostatic chuck attracts the wafer so that the flat plane of the wafer contacts the contacting surface of the electrostatic chuck when the electrostatic chuck is energized. A holder holds the wafer at a position which has a predetermined positional relationship with respect to the supporting base. The carrier is selectively transported between a plurality of stations including a work station, fixing device for fixing the carrier transported to the work station at a predetermined position in the work station, and an arrangement for energizing the electrostatic chuck when the carrier is fixed at the predetermined position in the work station and deenergizing the electrostatic chuck when the carrier is apart from the predetermined position.
摘要:
As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要:
3-(2-Trifluoro-1-hydroxyethyl)propenyl benzyl ether or derivatives thereof having the formula ##STR1## wherin R is a substituted or not substituted phenyl group and a mark * shows an asymmetric carbon atom, and derivatives thereof are provided, which are useful as a material for preparing liquid crystal compound.
摘要:
A dry etching apparatus using reactive ions is disclosed. A housing in which a workpiece is etched is provided with a cathode electrode on which the workpiece is mounted, and an anode electrode arranged opposite the cathode electrode. An etching gas is supplied to the housing, and pressure inside of the housing is held at a certain level. High frequency voltage is applied between the cathode and anode electrodes. A plurality of magnets are arranged outside of the housing to generate magnetic fields around the cathode electrode. The plurality of magnets are separated from one another, with a predetermined clearance being interposed therebetween, to form an endless track. The plurality of magnets are moved along the endless track, to thereby cause the magnetic fields to be moved in one direction on the cathode electrode.
摘要:
A fluid structure interaction simulation method includes a graph information forming process to form graph information of nodes obtained by discretizing a computing region for each of a fluid and a structure that are represented by meshes, and a main time development loop process to simulate a physical phenomenon. The loop process includes arranging IMEs (Interaction Mediating Elements) that move with a displacement of the structure, on a boundary of the structure, defining, within the IME, correcting functions of a pressure and a velocity of the fluid that interact with the pressure and the velocity of the fluid and the displacement of the structure, and executing a simulation based on the correcting functions, in a state in which the meshes of the fluid are mismatched to the meshes of the structure.
摘要:
A signal processing device includes an excessive input estimating unit that estimates excessive input of a target signal, a controller that calculates frequency characteristics which will lessen the excessive input of the target signal from the excessive input information estimated by the excessive input estimating unit, and a frequency characteristic modification unit that modifies the frequency characteristics of the target signal in accordance with the frequency characteristics the controller calculates.