公开(公告)号：US20060067066A1

公开(公告)日：2006-03-30

申请号：US10950827

申请日：2004-09-27

Applicant: Pascal Meier ,  Sanjay Dabral

Inventor： Pascal Meier ,  Sanjay Dabral

IPC: H01R12/28

CPC classification number: G06F1/189 ,  G06F1/184 ,  G06F1/185 ,  G06F1/186 ,  H01R12/79 ,  H05K1/14 ,  H05K1/147 ,  H05K3/222 ,  H05K3/305 ,  H05K2201/044 ,  H05K2201/10356 ,  H05K2201/10492 ,  H05K2201/10704 ,  H05K2201/2027 ,  Y10T29/49117

Abstract: A system and method are disclosed in which flex cables are affixed to PCBs, for providing high-speed signaling paths between ICs disposed upon the PCBs. The flex cables are fixably attached to the PCBs so as to substantially mimic their structural orientation. Where the configuration includes more than one PCB, the flex cables include multiple portions which are temporarily separable from one another and from the die, using flex-to-flex and flex-to-package connectors, allowing field maintenance of the configuration. By routing the high-speed signals between ICs onto the flex cable, single-layer PCBs can be used for non-critical and power delivery signals, at substantial cost savings. By disposing the flex cables onto the PCB rather than allowing the cables to float freely, the configuration is thermally managed as if the signals were on the PCB and cable routing problems are avoided.

公开(公告)号：US20060067041A1

公开(公告)日：2006-03-30

申请号：US10955676

申请日：2004-09-29

Applicant: Ashok Kabadi ,  Frank DeWeese

Inventor： Ashok Kabadi ,  Frank DeWeese

IPC: G06F1/16

CPC classification number: H05K7/1007 ,  H01R12/585 ,  H01R12/7052 ,  H01R12/7064 ,  H01R12/7076 ,  H05K3/301 ,  H05K3/308 ,  H05K3/325 ,  H05K2201/10325 ,  H05K2201/10704 ,  H05K2201/10719

Abstract: The apparatus and method described herein are for coupling an integrated circuit to a circuit board, while eliminating the need for a backing plate, when a compression socket is utilized. A plurality of tension pins are coupled to an integrated circuit for engaging a plurality of corresponding barrels in a circuit board to compress a compression socket to make an electrical connection between the integrated circuit and the circuit board.

Abstract translation: 当使用压缩插座时，本文描述的装置和方法用于将集成电路耦合到电路板，同时消除对背板的需要。 多个张紧销耦合到集成电路，用于接合电路板中的多个对应的筒以压缩压缩插座以在集成电路和电路板之间形成电连接。

公开(公告)号：US20050248040A1

公开(公告)日：2005-11-10

申请号：US11089914

申请日：2005-03-24

Applicant: Edward Osburn

Inventor： Edward Osburn

IPC: H01L21/44 ,  H01L23/498 ,  H01L23/50 ,  H01L27/10 ,  H05K1/02 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/0262 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0263 ,  H05K1/112 ,  H05K3/429 ,  H05K2201/093 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10704 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract translation: 公开了一种用于改进对半导体器件的功率的传递和滤波的方法和装置，其通过组织用于以条形配置携带功率的互连（引脚，球，焊盘或其他互连），其缩短了功率之间所需的导电路径 源极和半导体器件，并且降低该导电路径的电阻。

公开(公告)号：US06936502B2

公开(公告)日：2005-08-30

申请号：US10437006

申请日：2003-05-14

Applicant: Aneta Wyrzykowska ,  Herman Kwong ,  Luigi Difilippo

Inventor： Aneta Wyrzykowska ,  Herman Kwong ,  Luigi Difilippo

IPC: H05K1/11 ,  H05K3/30 ,  H05K3/46 ,  H01L21/60 ,  H05K3/32

CPC classification number: H05K1/112 ,  H01L2224/14 ,  H01L2224/17 ,  H01L2924/00014 ,  H05K3/303 ,  H05K3/4623 ,  H05K2201/09472 ,  H05K2201/09518 ,  H05K2201/09536 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10659 ,  H05K2201/10704 ,  H05K2201/10734 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.

Abstract translation: 提供一种在多层电路板的表面上实现电路元件的方法。 电路部件包括多个引脚，并且电路板包括穿透电路板的至少一个层的多个导电通孔，并被布置成形成用于在一个或多个信号处路由一个或多个迹线的至少一个通道 层的电路板。 该方法包括以下步骤：形成电路部件的多个引脚中的至少一个引脚以具有与电路板的相应通孔的深度相兼容的长度。

公开(公告)号：US20050040502A1

公开(公告)日：2005-02-24

申请号：US10937647

申请日：2004-09-08

Applicant: Gabe Cherian

Inventor： Gabe Cherian

IPC: H01L23/495 ,  H01L23/498 ,  H05K3/34

CPC classification number: H01L24/12 ,  H01L23/49555 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3426 ,  H05K2201/09418 ,  H05K2201/10318 ,  H05K2201/10386 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10825 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2924/00

Abstract: The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices. The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling, shock and vibrations and severe environment conditions in general. For leaded devices, the leads are oriented to face the thermal center of the devices and the system they interact with. For leadless devices, the mounting elements are treated or prepared to control the migration of solder along the length of the elements, to ensure that those elements retain their desired flexibility.

公开(公告)号：US06847529B2

公开(公告)日：2005-01-25

申请号：US10036957

申请日：2001-12-20

Applicant: Joseph Ted Dibene, II ,  David H. Hartke ,  Carl E. Hoge ,  Edward J. Derian

Inventor： Joseph Ted Dibene, II ,  David H. Hartke ,  Carl E. Hoge ,  Edward J. Derian

IPC: G06F1/18 ,  H01L23/427 ,  H01L23/433 ,  H01R4/64 ,  H01R12/16 ,  H05K1/02 ,  H05K1/14 ,  H05K3/30 ,  H05K3/36 ,  H05K7/10 ,  H05K7/20 ,  H05K1/11

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L23/433 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/15312 ,  H01L2924/3011 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7088 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036

Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.

Abstract translation: 公开了一种电源互连系统，其包括在第一电路板到第二电路板之间传递电力和接地信号的多个z轴兼容的连接器。 互连系统通过宽范围的频率提供极低的阻抗，并允许大量的电流从静电或动态从一个衬底传递到下一个衬底。 互连系统可以靠近模具定位，或者可以根据系统要求进一步远离。 互连也可用于占用两个基板之间的机械公差，同时提供低阻抗互连。

公开(公告)号：US20040226742A1

公开(公告)日：2004-11-18

申请号：US10437006

申请日：2003-05-14

Inventor： Aneta Wyrzykowska ,  Herman Kwong ,  Luigi Difilippo

IPC: H05K007/10

CPC classification number: H05K1/112 ,  H01L2224/14 ,  H01L2224/17 ,  H01L2924/00014 ,  H05K3/303 ,  H05K3/4623 ,  H05K2201/09472 ,  H05K2201/09518 ,  H05K2201/09536 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10659 ,  H05K2201/10704 ,  H05K2201/10734 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49139 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.

Abstract translation: 提供一种在多层电路板的表面上实现电路元件的方法。 电路部件包括多个引脚，并且电路板包括穿透电路板的至少一个层的多个导电通孔，并被布置成形成用于在一个或多个信号处路由一个或多个迹线的至少一个通道 层的电路板。 该方法包括以下步骤：形成电路部件的多个引脚中的至少一个引脚以具有与电路板的相应通孔的深度相兼容的长度。

公开(公告)号：US20040145877A1

公开(公告)日：2004-07-29

申请号：US10695197

申请日：2003-10-29

Inventor： Terumi Fujiyama ,  Kazuo Fukunaga ,  Morihiro Fukuda ,  Yoshiaki Kuwada ,  Hiromasa Mori ,  Yoshio Hashimoto

IPC: H05K001/18

CPC classification number: H01G4/40 ,  H01L23/66 ,  H01L24/81 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19011 ,  H01L2924/19103 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/162 ,  H05K2201/049 ,  H05K2201/10325 ,  H05K2201/10515 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H01L2924/00

Abstract: A sheet capacitor of the invention has a contact portion formed in a through-hole requiring electrical connection with IC connection pin among the through-holes in which the IC connection pins are inserted, and a capacitor element connected to the contact portion. Another sheet capacitor of the invention includes an insulating board and a capacitor element mounted on the insulating board. The insulating board has a connection land with an IC at the upper side, and a connection land with a printed wiring board at the lower side. The capacitor element and connection lands at the upper and lower side of the insulating board are connected with each other electrically. In any one of these configurations, the capacitor element of large capacity and low ESL is connected closely to the IC, and the mounting area of the peripheral circuits of the IC can be increased.

Abstract translation: 本发明的片状电容器具有形成在通孔中的接触部分，该通孔需要与插入IC连接引脚的通孔中的IC连接引脚电连接，以及连接到接触部分的电容器元件。 本发明的另一种薄片电容器包括安装在绝缘板上的绝缘板和电容器元件。 绝缘板具有在上侧具有IC的连接平台，以及在下侧具有印刷电路板的连接平台。 绝缘板的上侧和下侧的电容器元件和连接区域彼此电连接。 在这些配置中的任一种中，大容量的电容器元件和低ESL的电容元件紧密连接到IC，并且可以增加IC的外围电路的安装面积。

公开(公告)号：US06741480B2

公开(公告)日：2004-05-25

申请号：US10005024

申请日：2001-12-04

Applicant: David H. Hartke ,  Joseph Ted DiBene, II

Inventor： David H. Hartke ,  Joseph Ted DiBene, II

IPC: H05K111

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L23/433 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01074 ,  H01L2924/15192 ,  H01L2924/3011 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7088 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  H01L2924/00

Abstract: A method and apparatus for electrically interconnecting a first circuit board having a power conditioning circuit and a second circuit board having a power dissipating component disposed therebelow along a z (vertical) axis is disclosed. In an illustrative embodiment, the apparatus comprises a first flexible circuit having a first set of raised conductive contacts, the first flexible circuit disposed on a first side of the second circuit board; and a second flexible circuit having a second set of raised conductive contacts, the second flexible circuit disposed on a second side of the second circuit board opposing the first side of the second circuit board. A power signal from the power conditioning circuit is provided to the second circuit board at least in part by one of the first set of raised conductive contacts on the flexible circuit and the second set of raised conductive contacts on the second flexible circuit and a ground return is provided to the second circuit board by the other of the first set of raised conductive contacts on the first flexible circuit and the second set of raised conductive contacts on the second flexible circuit.

Abstract translation: 公开了一种用于将具有功率调节电路的第一电路板和具有沿z（垂直）轴设置在其下方的功率耗散部件的第二电路板电互连的方法和装置。 在说明性实施例中，该装置包括具有第一组凸起的导电触点的第一柔性电路，第一柔性电路设置在第二电路板的第一侧上; 以及第二柔性电路，其具有第二组凸起的导电触头，所述第二柔性电路设置在所述第二电路板的与所述第二电路板的第一侧相对的第二侧上。 来自功率调节电路的功率信号至少部分地由柔性电路上的第一组升高的导电触点之一和第二柔性电路上的第二组升高的导电触点和接地回路提供给第二电路板 通过第一柔性电路上的第一组升高的导电触点中的另一个和第二柔性电路上的第二组升高的导电触点而提供给第二电路板。

公开(公告)号：US06699046B2

公开(公告)日：2004-03-02

申请号：US10151679

申请日：2002-05-20

Applicant: Kwun-Yao Ho ,  Kung Moriss ,  Lin-Chou Tung

Inventor： Kwun-Yao Ho ,  Kung Moriss ,  Lin-Chou Tung

IPC: H01R1200

CPC classification number: H05K1/141 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/049 ,  H05K2201/10333 ,  H05K2201/10704 ,  H05K2201/2018 ,  H05K2201/2027

Abstract: A pin grid array integrated circuit connecting device which including a substrate, a sliding slice, a guiding frame and a driving apparatus. Said substrate further includes multiple holes to hold pins of a integrated circuit package, multiple conductive positioning components in the holes to hold said pins and connect said pins electrically, circuit device with proper circuit layout and multiple electrical connecting spots on the bottom of said substrate which connecting said multiple conductive positioning components thru said circuit device. The extra electronic components placed on said substrate will provide the additional function. Said sliding slice is placed on the top of said substrate and can be moved relatively. Multiple holes are placed on said sliding slice and positioned correspondingly to the holes on said substrate. Said guiding frame is placed on at least the two opposite sides of said substrate which guide said sliding move linearly along the extension of said guiding frame. Said driving apparatus is connecting to said sliding slice and, by rotating horizontally, drive said sliding slice to move in a proper manner linearly.

Abstract translation: 一种针阵列集成电路连接装置，其包括基板，滑动切片，引导框架和驱动装置。 所述衬底还包括多个孔以保持集成电路封装的引脚，孔中的多个导电定位部件以保持所述引脚并将所述引脚电连接，电路器件具有适当的电路布局和在所述衬底的底部上的多个电连接点 通过所述电路装置连接所述多个导电定位部件。 放置在所述基板上的额外的电子部件将提供额外的功能。 所述滑动片放置在所述衬底的顶部上并且可相对移动。 多个孔被放置在所述滑动切片上并相对于所述基底上的孔定位。 所述引导框架被放置在所述基板的至少两个相对的侧面上，所述两个相对侧沿着所述导向框架的延伸部线性地引导所述滑动移动。 所述驱动装置连接到所述滑动片，并且通过水平旋转驱动所述滑动片以适当的方式线性移动。