中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

306 records (took 0.022 seconds)

    State determination in resistance variable memory
    104.
    发明授权
    State determination in resistance variable memory 有权
    电阻变量记忆状态确定

    公开(公告)号：US09019754B1

    公开(公告)日：2015-04-28

    申请号：US14109329

    申请日：2013-12-17

    Applicant: Micron Technology, Inc.

    Inventor： Ferdinando Bedeschi

    IPC: G11C11/00 ,  G11C13/00 ,  G11C11/16

    CPC classification number: G11C11/1673 ,  G11C7/06 ,  G11C11/161 ,  G11C11/1693 ,  G11C11/5607 ,  G11C13/0002 ,  G11C13/0035 ,  G11C13/0038 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0047 ,  G11C2013/0057

    Abstract: An evaluation signal is applied to a memory cell in an array of resistance variable memory cells. The evaluation signal is configured to cause the memory cell to switch from a first state to a second state. Responses from the memory cell are sensed at three or more sample points. Differences between the responses are determined. For example, with three sample points, a first delta is determined between the first two responses and a second delta is determined between the last two responses. A difference of deltas is determined as a difference between the first and second delta, or vice versa. It is determined that the memory cell changes from the first to the second state if the difference of deltas is above a threshold. It is determined that the memory cell remains in the second state if the difference of deltas is below the threshold.

    Abstract translation: 将评估信号施加到电阻变量存储单元阵列中的存储单元。 评估信号被配置为使存储单元从第一状态切换到第二状态。 在三个或更多个采样点处感测来自存储器单元的响应。 确定响应之间的差异。 例如，对于三个采样点，在前两个响应之间确定第一增量，并且在最后两个响应之间确定第二增量。 三角洲差异被确定为第一和第二增量之间的差异，反之亦然。 如果三角波的差异高于阈值，则确定存储器单元从第一状态变为第二状态。 如果三角形的差值低于阈值，则确定存储器单元保持在第二状态。

    Cascoded sense amplifiers for self-selecting memory
    108.
    发明授权
    Cascoded sense amplifiers for self-selecting memory 有权

    公开(公告)号：US12300316B2

    公开(公告)日：2025-05-13

    申请号：US17896963

    申请日：2022-08-26

    Applicant: Micron Technology, Inc.

    Inventor： Umberto di Vincenzo ,  Ferdinando Bedeschi ,  Michele Maria Venturini ,  Claudia Palattella

    IPC: G11C13/00

    Abstract: Systems and methods for operating a memory include a sensing circuitry connected to a memory cell through an address decoder, a precharge circuitry configured to be connected to the sensing circuitry during a precharge stage and at least partially disconnected from the sensing circuitry during a sensing stage immediately following the precharge stage, and a reference voltage provided to the precharge circuitry, wherein the reference voltage is mirrored to the memory cell by mirroring a current flowing from the precharge circuitry with a current flowing from the sensing circuitry during the precharge stage.

    Refresh determination using memory cell patterns
    109.
    发明授权
    Refresh determination using memory cell patterns 有权

    公开(公告)号：US12236992B2

    公开(公告)日：2025-02-25

    申请号：US17852221

    申请日：2022-06-28

    Applicant: Micron Technology, Inc.

    Inventor： Umberto di Vincenzo ,  Ferdinando Bedeschi ,  Christian Marc Benoit Caillat

    IPC: G11C11/40 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096

    Abstract: A system includes a memory array having pattern cells and data cells. The pattern cells are configured to store only a first logic state. The data cells are configured to store the first logic state or a second logic state. Bias circuitry is configured to apply voltages to the pattern cells and data cells. Sensing circuitry is configured to read the pattern cells. A controller is configured to apply, using the bias circuitry, first voltages to the pattern cells; determine, using the sensing circuitry, that at least a portion of the pattern cells switch; determine, based on the portion of the pattern cells that switch, to refresh a codeword; and apply, using the bias circuitry, the refresh of the codeword.

    MEMORY CELL READ OPERATION TECHNIQUES
    110.
    发明申请
    MEMORY CELL READ OPERATION TECHNIQUES 有权

    公开(公告)号：US20250054543A1

    公开(公告)日：2025-02-13

    申请号：US18812133

    申请日：2024-08-22

    Applicant: Micron Technology, Inc.

    Inventor： Riccardo Muzzetto ,  Francesco Mastroianni ,  Ferdinando Bedeschi ,  Nevil N. Gajera

    IPC: G11C13/00

    Abstract: Methods, systems, and devices for memory cell read operation techniques are described. A memory device may determine a starting voltage for a second phase of a read operation for a set of memory cells which may have a different magnitude than a magnitude of a starting voltage of a first phase of the read operation. For example, the memory device may use an ending voltage of the first phase to determine the starting voltage for the second phase. In some cases, the starting voltage for the second phase may correspond to a difference of a voltage offset and the ending voltage of the first phase. As part of the second phase of the read operation, the memory device may apply a sequence of voltages to the set of memory cells in accordance with the determined starting voltage of the second phase.

Patent Agency Ranking