公开(公告)号：US11152423B2

公开(公告)日：2021-10-19

申请号：US16098283

申请日：2017-05-11

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Peter Brick ,  Matthias Sabathil ,  Frank Singer ,  Thomas Schwarz

IPC: H01L27/15 ,  H01L25/075 ,  H01L33/58 ,  H01L33/08 ,  H01L33/62

Abstract: An optical assembly and a display device are disclosed. In an embodiment an optical assembly includes a common carrier, a plurality of first chip groups, each first chip group comprising at least two similar luminescence diode chips, a plurality of second chip groups, each second chip group comprising at least two similar luminescence diode chips, wherein the first and second chip groups are arranged planar along a regular grid of first unit cells on a main surface of the common carrier and an optical element arranged downstream of the first and second chip groups with respect to a main radiation direction, wherein the luminescence diode chips of the different chip groups are configured to emit electromagnetic radiation of different wavelength characteristics.

公开(公告)号：US11024610B2

公开(公告)日：2021-06-01

申请号：US16318279

申请日：2017-07-13

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Thomas Schwarz ,  Alexander Martin ,  Jürgen Moosburger ,  Karl Engl

IPC: H01L25/075 ,  G09F9/00 ,  H01L33/62

Abstract: A module for a video wall includes a plurality of light-emitting components; and a carrier including conduction regions, wherein the light-emitting components each include a top side including a top-side contact and an underside including an underside contact, the light-emitting components are configured to emit electromagnetic radiation via the top side, the underside contacts of the light-emitting components electrically conductively connect to the conduction regions, the top-side contacts electrically contact a conductive layer, the light-emitting components each include at least four light-emitting semiconductor chips, the light-emitting semiconductor chips within a light-emitting component interconnect in parallel with one another, the light-emitting semiconductor chips within a light-emitting component each electrically conductively connect to the top-side contacts and the underside contacts of the light-emitting component, a plurality of adjacent light-emitting components constitute a cluster, and the light-emitting semiconductor chips of the light-emitting components of a cluster includes an identical nominal wavelength.

公开(公告)号：US11023194B2

公开(公告)日：2021-06-01

申请号：US16314467

申请日：2017-06-30

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Thomas Schwarz ,  Frank Singer ,  Jürgen Moosburger ,  Karl Engl ,  Alexander Martin

IPC: G09G1/00 ,  G06F3/14 ,  G09G3/32

Abstract: An arrangement includes at least two modules for a video wall including light-emitting components arranged on a carrier, wherein a drive circuit that selectively drives the component at the carrier is provided for each component, row lines and column lines are provided, each drive circuit connects to a row line and a column line, each drive circuit connects to power supply lines, the carrier includes plated-through holes that guide the row lines and the column lines onto an underside of the carrier, the two modules are arranged on a further carrier, the further carrier includes at least one recess, an electrical connector is arranged in the recess, and the electrical connector connects column lines and/or row lines of the two modules to one another.

公开(公告)号：US10388633B2

公开(公告)日：2019-08-20

申请号：US15743244

申请日：2016-07-27

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Thomas Schwarz ,  Frank Singer ,  Christian Leirer

IPC: H01L33/52 ,  H01L33/58 ,  H01L33/62 ,  H01L25/075

Abstract: A video wall module and a method for producing a video wall module are disclosed. In embodiments, the video wall module includes a plurality of light emitting diode chips, each light emitting diode chip comprising a top electrode arranged at a top side of the light emitting diode chip, a bottom electrode arranged at a bottom side of the light emitting diode chip and a molded body embedding the light emitting diode chips, a front-side metallization arranged at the front side of the molded body, wherein the top electrodes are connected to the front-side metallization, a rear-side metallization arranged at a rear side of the molded body, wherein the bottom electrodes are connected to the rear-side metallization, a dielectric layer arranged at the rear side of the molded body and an outer metallization arranged at the dielectric layer, wherein the rear-side metallization is electrically conductively connected to the outer metallization.

公开(公告)号：US20190252350A1

公开(公告)日：2019-08-15

申请号：US16345449

申请日：2017-10-25

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Thomas Schwarz ,  Jürgen Moosburger ,  Frank Singer

IPC: H01L23/00 ,  H01L21/683 ,  B65G47/90

CPC classification number: H01L24/97 ,  B65G47/90 ,  H01L21/67144 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L33/0095 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/75303 ,  H01L2224/7565 ,  H01L2224/7598 ,  H01L2224/83192 ,  H01L2224/95001 ,  H01L2224/95136 ,  H01L2224/95146 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A method of transferring semiconductor chips includes providing a transfer tool having a plurality of segments, each segment having a liquid receiving area; providing a plurality of semiconductor chips in a regular array on a source carrier; providing a target carrier; selectively arranging liquid drops on the liquid receiving areas of some of the segments; causing the transfer tool to approach the source carrier, each liquid drop contacting and wetting a semiconductor chip; lifting the transfer tool from the source carrier, wherein semiconductor chips wetted by liquid drops are lifted from the source carrier by the transfer tool; causing the target carrier by the transfer tool, to approach the semiconductor chips arranged on the transfer tool contacting the target carrier; and lifting the transfer tool from the target carrier, the semiconductor chips contacting the target carrier remaining on the target carrier

公开(公告)号：US20190189598A1

公开(公告)日：2019-06-20

申请号：US16322069

申请日：2017-08-01

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Frank Singer ,  Jürgen Moosburger ,  Thomas Schwarz ,  Lutz Hoeppel ,  Matthias Sabathil

IPC: H01L25/075 ,  H01L33/62 ,  H01L33/56 ,  H01L33/58

CPC classification number: H01L25/0753 ,  H01L33/54 ,  H01L33/56 ,  H01L33/58 ,  H01L33/62 ,  H01L2933/0066

Abstract: A multi-chip module is disclosed. In an embodiment, a multi-chip module includes a first carrier including a mold material and at least two light-emitting diode chips embedded at least by side faces in the first carrier, wherein the light-emitting diode chips have first electrical contacts on a front side and second electrical contacts on a rear side, wherein the front side is configured as a radiation side, wherein the first electrical contacts are connected to control lines, wherein the control lines are arranged on a front side of the first carrier, wherein the second electrical contacts are connected to a collective line, and wherein the collective line is led to a rear side of the first carrier.

公开(公告)号：US10217913B2

公开(公告)日：2019-02-26

申请号：US15036413

申请日：2014-10-30

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Markus Pindl ,  Thomas Schwarz ,  Frank Singer ,  Sandra Sobczyk

IPC: H01L33/54 ,  H01L33/00 ,  H01L31/0203 ,  H01L31/0232 ,  H01L31/18 ,  H01L33/50 ,  H01L33/48 ,  H01L33/56 ,  H01L21/56

Abstract: The invention relates to a method for producing a plurality of optoelectronic semiconductor components, comprising the following steps: preparing a plurality of semiconductor chips spaced in a lateral direction to one another; forming a housing body assembly, at least one region of which is arranged between the semiconductor chips; forming a plurality of fillets, each adjoining a semiconductor chip and being bordered in a lateral direction by a side surface of each semiconductor chip and the housing body assembly; and separating the housing body assembly into a plurality of optoelectronic components, each component having at least one semiconductor chip and a portion of the housing body assembly as a housing body, and each semiconductor chip not being covered by material of the housing body on a radiation emission surface of the semiconductor component, which surface is located opposite a mounting surface. The invention also relates to a semiconductor component.

公开(公告)号：US20180287008A1

公开(公告)日：2018-10-04

申请号：US15940929

申请日：2018-03-29

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Andreas Plößl ,  Siegfried Herrmann ,  Martin Rudolf Behringer ,  Frank Singer ,  Thomas Schwarz

IPC: H01L33/00 ,  H01L25/075 ,  H01L33/48

Abstract: A method for producing an optoelectronic semiconductor component and an optoelectronic semiconductor component are disclosed. In an embodiment the method include A) providing at least two source substrates, wherein each of the source substrates is equipped with a specific type of radiation-emitting semiconductor chip; B) providing a target substrate having a mounting plane, the mounting plane being configured for mounting the semiconductor chip; and C) transferring at least part of the semiconductor chips with a wafer-to-wafer process from the source substrates onto the target substrate so that the semiconductor chips, within one type, maintain their relative position with respect to one another, so that each type of semiconductor chips arranged on the target substrate has a different height above the mounting plane, wherein the semiconductor chips are at least one of at least partially stacked one above the other or at least partially applied to at least one casting layer.

公开(公告)号：US10074769B2

公开(公告)日：2018-09-11

申请号：US14767634

申请日：2014-02-06

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Thomas Schwarz ,  Hans-Jürgen Lugauer ,  Jürgen Moosburger ,  Stefan Illek ,  Tansen Varghese ,  Matthias Sabathil

IPC: H01L33/62 ,  H01L33/00 ,  H01L33/48 ,  H01L33/60

CPC classification number: H01L33/0095 ,  H01L33/483 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2924/00

Abstract: A method of producing an optoelectronic component includes providing a carrier having a carrier surface, a first lateral section of the carrier surface being raised relative to a second lateral section of the carrier surface; arranging an optoelectronic semiconductor chip having a first surface and a second surface on the carrier surface, wherein the first surface faces toward the carrier surface; and forming a molded body having an upper side facing toward the carrier surface and a lower side opposite the upper side, the semiconductor chip being at least partially embedded in the molded body.

公开(公告)号：US20180212121A1

公开(公告)日：2018-07-26

申请号：US15742106

申请日：2016-07-11

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Christian Leirer ,  Korbinian Perzlmaier ,  Anna Kasprzak-Zablocka ,  Berthold Hahn ,  Thomas Schwarz

IPC: H01L33/62 ,  H01L33/22 ,  H01L33/38 ,  H01L33/44 ,  H01L33/64 ,  H01L33/50 ,  H01L33/00

CPC classification number: H01L33/62 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/22 ,  H01L33/382 ,  H01L33/44 ,  H01L33/486 ,  H01L33/505 ,  H01L33/52 ,  H01L33/647 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/0041

Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.