公开(公告)号：US11810839B2

公开(公告)日：2023-11-07

申请号：US17674697

申请日：2022-02-17

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Cristina Somma

IPC: H01L23/495 ,  H01L23/498

CPC classification number: H01L23/49503 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/49816

Abstract: One or more embodiments are directed to semiconductor packages and methods in which one or more electrical components are positioned between a semiconductor die and a surface of a substrate. In one embodiment, a semiconductor package includes a substrate having a first surface. One or more electrical components are electrically coupled to electrical contacts on the first surface of the substrate. A semiconductor die is positioned on the one or more electrical components, and the semiconductor die has an active surface that faces away from the substrate. An adhesive layer is on the first surface of the substrate and on the one or more electrical components, and the semiconductor die is spaced apart from the one or more electrical components by the adhesive layer. Wire bonds are provided that electrically couples the active surface of the semiconductor die to the substrate.

公开(公告)号：US11809740B1

公开(公告)日：2023-11-07

申请号：US17663847

申请日：2022-05-18

Applicant: STMicroelectronics S.r.l.

Inventor： Walter Girardi

IPC: G11C29/04 ,  G11C29/14 ,  G11C29/56 ,  G06F13/00 ,  G06F3/06 ,  G11C7/10 ,  G11C29/00

CPC classification number: G06F3/0655 ,  G06F3/0671 ,  G11C7/1036 ,  G11C29/00

Abstract: A circuit for reading or writing a RAM includes a shift register coupled to the RAM, a test data input, and a test data output. The circuit further includes a control circuit configured to generate a pulse every N clock cycles, each pulse triggering a RAM access operation transferring data between the shift register and the RAM, N being equal to a data width of the RAM divided by a parallel factor, the parallel factor being a number of pins in either the test data input or the test data output configured for parallel data loading.

公开(公告)号：US11808650B2

公开(公告)日：2023-11-07

申请号：US17063147

申请日：2020-10-05

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Pagani ,  Federico Giovanni Ziglioli ,  Bruno Murari

IPC: G01L5/00 ,  G01L1/18 ,  G01L1/20 ,  F16B31/02 ,  G01L5/24

CPC classification number: G01L5/0038 ,  F16B31/028 ,  G01L1/18 ,  G01L1/20 ,  G01L5/243

Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.

公开(公告)号：US20230353052A1

公开(公告)日：2023-11-02

申请号：US18300945

申请日：2023-04-14

Applicant: STMicroelectronics S.r.l

Inventor： Alessandro Nicolosi ,  Alessandra Farina ,  Edoardo Bonizzoni

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/08

CPC classification number: H02M3/158 ,  H02M1/0009 ,  H02M1/083

Abstract: A control module, for a resonant switched-capacitor converter with an inductor, includes a controller stage, an input stage generating a control signal indicating a control quantity, a delay stage generating a duration signal indicating a time quantity, and a circuit indicating zero crossings of the inductor current. If the control quantity is variable, the input stage clamps the control quantity to a control threshold. When in normal mode, the controller stage controls the converter to carry out a phase sequence with timings that depend on the zero crossings and the time quantity, so the converter generates an output current that depends on the time quantity and is prevented from dropping below a minimum current. If the output voltage reaches an upper threshold, the controller stage switches into pulse-skipping mode to suspend the phase sequence, and resumes the phase sequence after the output voltage drops to a lower threshold.

公开(公告)号：US20230352050A1

公开(公告)日：2023-11-02

申请号：US18300806

申请日：2023-04-14

Applicant: STMicroelectronics S.r.l.

Inventor： Ezio Galbiati ,  Maurizio Ricci

IPC: G11B19/20

CPC classification number: G11B19/2072

Abstract: A method includes coupling an electric motor in a hard disk drive to a set of driver circuits. Each driver circuit includes a high-side switch and a low-side switch. The high-side switch has a high-side current flow path between a supply node coupled to a supply voltage and a switching node coupled to a winding of the electric motor. The low-side switch has a low-side current flow path between the switching node and ground. Respective conduction currents are generated through the low-side current flow paths, in response to a command to reduce the motor speed by coupling a drive voltage to the control terminals of the low-side switches. An intensity of at least one of the respective conduction currents is sensed. In response to the sensed current intensity exceeding a current intensity threshold, the control terminals of the low-side switches are coupled to respective ones of the switching nodes.

公开(公告)号：US11803202B2

公开(公告)日：2023-10-31

申请号：US17933972

申请日：2022-09-21

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Ruta ,  Antonio Conte ,  Michelangelo Pisasale ,  Agatino Massimo Maccarrone ,  Francesco Tomaiuolo

IPC: G05F1/575 ,  H03K5/05 ,  H03K5/24 ,  H02M3/07

CPC classification number: G05F1/575 ,  H02M3/073 ,  H03K5/05 ,  H03K5/249

Abstract: A voltage regulator receives an input voltage and produces a regulated output voltage. A first feedback network compares a feedback signal to a reference signal to assert/de-assert a first pulsed control signal when the reference signal is higher/lower than the feedback signal. A second feedback network compares the output voltage to a threshold signal to assert/de-assert a second control signal when the threshold signal is higher/lower than the output voltage. A charge pump is enabled if the second control signal is de-asserted and is clocked by the first pulsed control signal to produce a supply voltage higher than the input voltage. A first pass element is enabled when the second control signal is asserted and is selectively activated when the first pulsed control signal is asserted. A second pass element is selectively activated when the second control signal is de-asserted.

公开(公告)号：US11802042B2

公开(公告)日：2023-10-31

申请号：US17117469

申请日：2020-12-10

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Terzi

IPC: G02B26/08 ,  B81B7/00 ,  G02B7/182

CPC classification number: B81B7/008 ,  G02B7/182 ,  B81B2201/042 ,  G02B26/08

Abstract: A method of operating a MEMS device includes generating a MEMS drive signal, and generating and modifying the MEMS drive signal based upon a control signal to produce a modified drive signal. The method further includes generating the control signal by determining when a feedback signal from the MEMS device is at its peak value, comparing the peak value to a desired value when the feedback signal is as its peak, and generating the control signal depending upon whether the peak value is at least equal to a desired value. The modification of the MEMS drive signal based upon the control signal to produce the modified drive signal includes skipping generation of a next pulse of the modified drive signal when the control signal indicates the peak value is at least equal to the desired value.

公开(公告)号：US11798630B2

公开(公告)日：2023-10-24

申请号：US17407903

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Marcella Carissimi ,  Fabio Enrico Carlo Disegni ,  Chantal Auricchio ,  Cesare Torti ,  Davide Manfre' ,  Laura Capecchi ,  Emanuela Calvetti ,  Stefano Zanchi

IPC: G11C16/28 ,  G11C16/10 ,  G11C7/04 ,  G11C16/24 ,  G11C16/30

CPC classification number: G11C16/102 ,  G11C7/04 ,  G11C16/24 ,  G11C16/28 ,  G11C16/30

Abstract: A memory device includes programmable memory cells and a programming circuit for programming a selected memory cell to a target logic state by applying one or more programming current pulses. A temperature sensor operates to sense a temperature of the memory device. A reading circuit reads a current logic state of the selected memory cell after a predetermined programming current pulse of the programming current pulses. The reading circuit includes a sensing circuit that senses a current logic state of the selected memory cell according to a comparison between a reading electric current depending on the current logic state of the selected memory cell and a reference current. An adjusting circuit adjusts one or the other of the reading electric current and the reference electric current to be provided to the sensing circuit according to the temperature of the memory device.

公开(公告)号：US11793406B2

公开(公告)日：2023-10-24

申请号：US17948890

申请日：2022-09-20

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco Rundo ,  Francesca Trenta ,  Sabrina Conoci ,  Sebastiano Battiato

IPC: G01C22/00 ,  A61B5/00 ,  B60W60/00 ,  A61B5/024 ,  A61B5/0255 ,  A61B5/18 ,  B60W40/08 ,  B60W50/14 ,  G06N3/08 ,  G06V20/59 ,  G06V40/16 ,  G06N3/044 ,  G06F18/21 ,  G06N3/045 ,  G06V40/10

CPC classification number: A61B5/0077 ,  A61B5/0255 ,  A61B5/02405 ,  A61B5/02416 ,  A61B5/18 ,  A61B5/6893 ,  A61B5/6898 ,  A61B5/7267 ,  A61B5/7278 ,  A61B5/746 ,  B60W40/08 ,  B60W50/14 ,  B60W60/0051 ,  G06N3/044 ,  G06N3/08 ,  G06V20/597 ,  G06V40/165 ,  G06V40/166 ,  G06V40/167 ,  G06V40/171 ,  A61B2576/02 ,  B60W2050/143 ,  G06F18/217 ,  G06N3/045 ,  G06V40/15

Abstract: A method includes receiving a video signal that comprises a time series of images of a face of a human, wherein the images in the time series of images comprise a set of landmark points in the face, applying tracking processing to the video signal to reveal variations over time of at least one image parameter at the set of landmark points in the human face, generating a set of variation signals indicative of variations revealed at respective landmark points in the set of landmark points, applying processing to the set of variation signals, the processing comprising artificial neural network processing to produce a reconstructed PhotoPletysmoGraphy (PPG) signal, and estimating a heart rate variability of a variable heart rate of the human as a function of the reconstructed PPG signal.

公开(公告)号：US20230336176A1

公开(公告)日：2023-10-19

申请号：US18296325

申请日：2023-04-05

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS (ALPS) SAS

Inventor： Antonino CONTE ,  Marco RUTA ,  Michelangelo PISASALE ,  Thomas JOUANNEAU

IPC: H03K19/0185 ,  H03K19/20

CPC classification number: H03K19/018521 ,  H03K19/20

Abstract: A level-shifter circuit receives one or more input signals in an input level domain and includes provides at an output node an output signal in an output level domain shifted with respect to the input level domain. The circuit includes output circuitry including a first drive node and a second drive node that receive first and second logical signals so that the output signal has a first output level or a second output level in the output level domain as a function of at least one of the first and second logical signals. The circuit includes first and second shift capacitors coupled to the first and second drive nodes as well as capacitor refresh circuitry.