公开(公告)号：US10103247B1

公开(公告)日：2018-10-16

申请号：US15785631

申请日：2017-10-17

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ruilong Xie ,  Hui Zang ,  Kangguo Cheng ,  Tenko Yamashita ,  Chun-chen Yeh

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L27/088 ,  H01L29/45 ,  H01L21/8234

Abstract: Methods form a structure having a lower source/drain contacting a substrate at the bottom of a transistor. A semiconductor fin extends from the lower source/drain away from the bottom of the transistor. An upper source/drain contacts an opposite end of the fin at the top of the transistor. A gate conductor surrounds (but is electrically insulated from the fin) and includes a raised contact portion extending toward the top of the transistor. A buried contact is located at the bottom of the transistor, and is electrically connected to the first source/drain. A silicide and a conformal metal are between the buried contact and the first source/drain. The conformal metal is also between the gate conductor and the fin. A first contact extends to the buried contact, a second contact extends to the upper source/drain, and a third contact extends to the raised contact portion.

公开(公告)号：US20180240715A1

公开(公告)日：2018-08-23

申请号：US15889654

申请日：2018-02-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Chun-Chen Yeh ,  Tenko Yamashita ,  Kangguo Cheng

IPC: H01L21/8238 ,  H01L21/324 ,  H01L29/66 ,  H01L29/423 ,  H01L21/306 ,  H01L29/78 ,  H01L21/308 ,  H01L27/092

CPC classification number: H01L21/823885 ,  H01L21/30604 ,  H01L21/3085 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/82385 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/42376 ,  H01L29/6656 ,  H01L29/66666 ,  H01L29/7827

Abstract: A device includes, among other things, a first vertical transistor device positioned above a semiconductor substrate. The first vertical transistor device includes a first gate structure, a first top spacer positioned above the first gate structure and having a first thickness in a vertical direction, and a first doped top source/drain structure positioned above the first top spacer. A second vertical transistor device positioned above the semiconductor substrate includes a second gate structure, a second top spacer positioned above the second gate structure and having a second thickness in a vertical direction less than the first thickness, and a second doped top source/drain structure positioned above the second top spacer.

公开(公告)号：US10032884B2

公开(公告)日：2018-07-24

申请号：US14920354

申请日：2015-10-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

Inventor： Xiuyu Cai ,  Kangguo Cheng ,  Ali Khakifirooz ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/20 ,  H01L21/3105

Abstract: Semiconductor devices and methods for making the same includes conformally forming a first spacer on a plurality of fins. A second spacer is conformally formed on the first spacer, the second spacer being formed from a different material from the first spacer. The plurality of fins are etched below a bottom level of the first spacer to form a fin cavity. Material from the first spacer is removed to expand the fin cavity. Fin material is grown directly on the etched plurality of fins to fill the fin cavity.

公开(公告)号：US20180076299A1

公开(公告)日：2018-03-15

申请号：US15815857

申请日：2017-11-17

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/45 ,  H01L29/417 ,  H01L29/267 ,  H01L29/24 ,  H01L29/165 ,  H01L29/161 ,  H01L29/08 ,  H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/324 ,  H01L21/285

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US09911657B2

公开(公告)日：2018-03-06

申请号：US15291750

申请日：2016-10-12

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Junli Wang ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/94 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/93 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L27/0629 ,  H01L21/3083 ,  H01L21/3086 ,  H01L21/823431 ,  H01L27/0733 ,  H01L29/1083 ,  H01L29/66174 ,  H01L29/66537 ,  H01L29/6656 ,  H01L29/785 ,  H01L29/93

Abstract: A semiconductor device includes a semiconductor substrate having a fin-type field effect transistor (finFET) on a first region and a fin varactor on a second region. The finFET includes a first semiconductor fin that extends from an upper finFET surface thereof to the upper surface of the first region to define a first total fin height. The fin varactor includes a second semiconductor fin that extends from an upper varactor surface thereof to the upper surface of the second region to define a second total fin height that is different from the first total fin height of the finFET.

公开(公告)号：US09882024B2

公开(公告)日：2018-01-30

申请号：US15361994

申请日：2016-11-28

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US09837277B2

公开(公告)日：2017-12-05

申请号：US14824360

申请日：2015-08-12

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/285 ,  H01L29/78 ,  H01L29/08 ,  H01L29/45 ,  H01L21/283 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417

CPC classification number: H01L21/28518 ,  H01L21/283 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the substrate; performing an epitaxial growth process over the recessed fin to form a source/drain over the recessed fin; and disposing a conductive metal around the source/drain.

公开(公告)号：US09793113B2

公开(公告)日：2017-10-17

申请号：US15075668

申请日：2016-03-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alexander Reznicek ,  Dominic J. Schepis ,  Kangguo Cheng ,  Bruce B. Doris ,  Pouya Hashemi

IPC: H01L21/20 ,  H01L29/78 ,  H01L21/02 ,  H01L21/31 ,  H01L21/311 ,  H01L29/06 ,  H01L29/66 ,  H01L27/092 ,  H01L29/10 ,  H01L29/165 ,  H01L21/762 ,  H01L21/8234

CPC classification number: H01L21/0243 ,  H01L21/0237 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/31 ,  H01L21/311 ,  H01L21/76224 ,  H01L21/823431 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66446 ,  H01L29/66795 ,  H01L29/785

Abstract: One aspect of the disclosure relates to a method of forming a semiconductor structure. The method may include: forming a set of openings within a substrate; forming an insulator layer within each opening in the set of openings; recessing the substrate between adjacent openings containing the insulator layer in the set of openings to form a set of insulator pillars on the substrate; forming sigma cavities within the recessed substrate between adjacent insulator pillars in the set of insulator pillars; and filling the sigma cavities with a semiconductor material over the recessed substrate between adjacent insulator pillars.

公开(公告)号：US20170243956A1

公开(公告)日：2017-08-24

申请号：US15482040

申请日：2017-04-07

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L21/3086 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31 ,  H01L21/324 ,  H01L29/66795

Abstract: A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etch to remove a portion of the fin to cut the fin into a first cut fin and a second cut fin, the first cut fin having a first and second fin end and the second cut fin having a first and second fin ends; forming an oxide layer along an endwall of the first fin end and an endwall of the second fin end of the first cut fin, and an endwall of the first fin end and an endwall of the second fin end of the second cut fin; disposing a liner onto the oxide layer disposed onto the endwall of the first fin end of the first cut fin to form a bilayer liner; and performing a second etch to remove a portion of the second cut fin.

公开(公告)号：US20170194499A1

公开(公告)日：2017-07-06

申请号：US15462644

申请日：2017-03-17

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES INC.

Inventor： Xiuyu Cai ,  Kangguo Cheng ,  Ali Khakifirooz ,  Ruilong Xie

IPC: H01L29/78 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66 ,  H01L21/321

CPC classification number: H01L29/7856 ,  H01L21/0217 ,  H01L21/28141 ,  H01L21/3212 ,  H01L29/42364 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/785 ,  H01L29/78654

Abstract: A semiconductor structure including a semiconductor material portion located on a substrate and extending along a lengthwise direction, a gate stack overlying a portion of the semiconductor material portion, and a first low-k spacer portion and a second low-k spacer portion abutting the gate stack and spaced from each other by the gate stack along said lengthwise direction. The first low-k spacer portion and the second low-k spacer portion each part of a recessed dummy gate structure on the substrate and a sacrificial spacer with gaps around and above a portion of the dummy gate stack. The gaps are filled in with the first low-k spacer portion and the second low-k spacer portion.