公开(公告)号：US09515366B2

公开(公告)日：2016-12-06

申请号：US13854935

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Eunyoung Seok ,  Baher Haroun

IPC: H01P5/107 ,  H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/18

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A dielectric waveguide may be manufactured by forming a set of parallel channels in a planar sheet that has a lower dielectric constant value. The set of channels is then filled with a material having a higher dielectric constant value. The planar sheet is sliced into a plurality of strips that each contain one or more of the channels.

Abstract translation: 可以通过在具有较低介电常数值的平面片中形成一组平行通道来制造电介质波导。 然后用具有较高介电常数值的材料填充该组通道。 平面片被切成多个条，每条都包含一个或多个通道。

公开(公告)号：US09515363B2

公开(公告)日：2016-12-06

申请号：US14574363

申请日：2014-12-17

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer

IPC: H01P1/213 ,  H01P3/16 ,  H01P1/20 ,  H01P3/12 ,  H01P5/12

CPC classification number: H01P1/213 ,  H01P1/2002 ,  H01P3/122 ,  H01P3/16 ,  H01P5/12

Abstract: Signals on a dielectric waveguide are filtered to pass or block selected frequencies. A combined signal is received in the DWG, wherein the combined signal comprises at least a first frequency signal with a first wavelength and a second frequency signal with a second wavelength. The combined signal is split into a first portion and a second portion. The first portion of the combined signal is delayed by an amount of delay time to form a delayed first portion. The delayed first portion is joined with the received combined signal to form a filtered signal such that the first frequency signal is enhanced by constructive interference while the second frequency signal is diminished by destructive interference. A portion of the filtered signal is provided to a receiver, whereby the amplitude of the second frequency signal is attenuated in the filtered signal.

Abstract translation: 对介质波导上的信号进行滤波以通过或阻止选定的频率。 在DWG中接收组合信号，其中组合信号至少包括具有第一波长的第一频率信号和具有第二波长的第二频率信号。 组合信号被分成第一部分和第二部分。 组合信号的第一部分延迟延迟时间的量以形成延迟的第一部分。 延迟的第一部分与接收到的组合信号相结合以形成经滤波的信号，使得第一频率信号通过相长干扰而增强，而第二频率信号被破坏性干扰减小。 经滤波的信号的一部分被提供给接收器，由此第二频率信号的幅度在滤波信号中衰减。

公开(公告)号：US09490518B1

公开(公告)日：2016-11-08

申请号：US14867662

申请日：2015-09-28

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Bradley Allen Kramer

IPC: H01P3/16 ,  H01Q1/50 ,  H01P11/00 ,  H01Q19/18 ,  H01Q19/10 ,  H01Q15/14 ,  H04B1/04

CPC classification number: H01P3/16 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15321 ,  H01Q1/24 ,  H01Q13/085 ,  H01Q15/14 ,  H01Q19/10 ,  H01Q21/28 ,  H04B1/04

Abstract: A system is provided for transmitting sub-terahertz electro-magnetic radio frequency (RF) signals using a dielectric waveguide (DWG) having a dielectric core member surrounded by dielectric cladding. An RF transmitter is coupled to an antenna located on a first substrate, in which the antenna is adjacent an edge of the substrate. The first substrate is mounted on a second substrate. A conductive reflector plate is formed on the top surface of the second substrate. An end of the DWG is mounted on the second substrate over the reflector plate such that an exposed face of the core member at the end of the DWG is adjacent the antenna. The core member at the end of DWG forms an angle of inclination with the second substrate in which the angle is in a range of approximately 10-30 degrees.

Abstract translation: 提供一种用于使用具有由电介质包层围绕的介质芯构件的电介质波导（DWG）发射亚太赫兹电磁射频（RF）信号的系统。 RF发射器耦合到位于第一衬底上的天线，其中天线邻近衬底的边缘。 第一衬底安装在第二衬底上。 导电反射板形成在第二基板的顶表面上。 DWG的一端安装在反射板上的第二基板上，使得在DWG端部的芯部件的暴露面与天线相邻。 DWG结束时的芯部件与第二基板形成倾斜角度，其中角度在大约10-30度的范围内。

公开(公告)号：US09472840B2

公开(公告)日：2016-10-18

申请号：US14285616

申请日：2014-05-22

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Baher Haroun

IPC: H01P3/16 ,  H01P3/12

CPC classification number: H01P3/16 ,  H01P3/122

Abstract: A dielectric waveguide (DWG) has a dielectric core member that has a length L and an oblong cross section. The core member has a first dielectric constant value. A dielectric cladding surrounds the dielectric core member; the cladding has a second dielectric constant value that is lower than the first dielectric constant. A conductive shield layer surrounds a portion of the dielectric cladding.

Abstract translation: 电介质波导（DWG）具有长度L和长方形横截面的电介质芯构件。 芯构件具有第一介电常数值。 电介质包层围绕介电芯构件; 所述包层具有低于所述第一介电常数的第二介电常数值。 导电屏蔽层围绕电介质包层的一部分。

公开(公告)号：US20160291549A1

公开(公告)日：2016-10-06

申请号：US14674197

申请日：2015-03-31

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Benjamin S. Cook ,  Phillip Nadeau ,  Simon Joshua Jacobs ,  Django Earl Trombley

IPC: G04F5/14 ,  H03L7/26

CPC classification number: G04F5/145 ,  G01N29/36 ,  G01N29/44 ,  G04F5/14 ,  H03L7/26

Abstract: Described examples include a millimeter wave atomic clock apparatus, chip scale vapor cell, and fabrication method in which a low pressure dipolar molecule gas is provided in a sealed cavity with a conductive interior surface forming a waveguide. Non-conductive apertures provide electromagnetic entrance to, and exit from, the cavity. Conductive coupling structures formed on an outer surface of the vapor cell near the respective non-conductive apertures couple an electromagnetic field to the interior of the cavity for interrogating the vapor cell using a transceiver circuit at a frequency that maximizes the rotational transition absorption of the dipolar molecule gas in the cavity to provide a reference clock signal for atomic clock or other applications.

Abstract translation: 所描述的实例包括毫米波原子钟装置，芯片尺度蒸汽池及其制造方法，其中低密度偶极子分子气体被设置在具有形成波导的导电内表面的密封腔中。 非导电孔径为腔提供电磁入口并从腔排出。 形成在相应不导电孔隙附近的蒸气室的外表面上的导电耦合结构将电磁场耦合到空腔的内部，以便使用收发器电路以使得偶极子的旋转跃迁吸收最大化的频率 在腔中分配气体，为原子钟或其他应用提供参考时钟信号。

公开(公告)号：US09373878B2

公开(公告)日：2016-06-21

申请号：US13854954

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Gerd Schuppener ,  Juan Alejandro Herbsommer ,  Robert Floyd Payne

IPC: H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A communication cable includes a dielectric wave guide (DWG) that has a dielectric core member that has a first dielectric constant value and a cladding surrounding the dielectric core member that has a second dielectric constant value that is lower than the first dielectric constant. An RJ45 compatible connector is attached to a mating end of the DWG. The RJ45 connector is configured to retain a complimentary coupling mechanism on a mating end of a second DWG.

Abstract translation: 通信电缆包括具有第一介电常数值的介质芯构件和围绕介电芯构件的包层的电介质波导（DWG），其具有低于第一介电常数的第二介电常数值。 RJ45兼容连接器连接到DWG的配对端。 RJ45连接器被配置为在第二DWG的配合端上保持互补的耦合机构。

公开(公告)号：US09373571B2

公开(公告)日：2016-06-21

申请号：US14938387

申请日：2015-11-11

Applicant: Texas Instruments Incorporated

Inventor： Marie Denison ,  Brian Ashley Carpenter ,  Osvaldo Jorge Lopez ,  Juan Alejandro Herbsommer ,  Jonathan Noquil

IPC: H01L25/18 ,  H01L23/495 ,  H01L23/00 ,  H01L21/50 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16 ,  H01L25/00 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/49575 ,  H01L21/50 ,  H01L21/561 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49838 ,  H01L24/29 ,  H01L24/32 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/84 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40145 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01028 ,  H01L2924/014 ,  H01L2924/20752

Abstract: An electronic multi-output device has a substrate including a first pad, a second pad and a plurality of pins. A first chip with a first transistor has a first terminal on one chip surface and a second and third terminals on the opposite chip surface. The first chip with its first terminal is tied to the first pad. A second chip with a second transistor has a first terminal on one chip surface and a second and third terminals on the opposite chip surface. The second chip with its first terminal is tied to the second pad. The second terminals are connected by a discrete first metal clip and a second metal clip to respective substrate pins. A composite third chip has a third and a fourth transistor integrated so that the first terminals of the transistors are on one chip surface. The second terminals are merged into a common terminal. The patterned third terminals are on the opposite chip surface. The first terminals are vertically attached to the first and second metal clips, respectively. The common terminal is connected by a common clip to a substrate pin.

Abstract translation: 电子多输出装置具有包括第一垫，第二垫和多个销的基板。 具有第一晶体管的第一芯片在一个芯片表面上具有第一端子，在相对的芯片表面上具有第二和第三端子。 第一个芯片与第一个终端绑在第一个焊盘上。 具有第二晶体管的第二芯片在一个芯片表面上具有第一端子，在相对的芯片表面上具有第二和第三端子。 具有第一个终端的第二个芯片与第二个焊盘相连。 第二端子通过离散的第一金属夹和第二金属夹连接到相应的衬底引脚。 复合第三芯片具有集成的晶体管的第一端子在一个芯片表面上的第三和第四晶体管。 第二个终端被合并成一个公共终端。 图案化的第三端子在相对的芯片表面上。 第一端子分别垂直地附接到第一和第二金属夹。 公共端子通过公共夹子连接到基板引脚。

公开(公告)号：US09312591B2

公开(公告)日：2016-04-12

申请号：US13854951

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Robert Floyd Payne

IPC: H01P1/04 ,  H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12 ,  H01P5/107

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A dielectric wave guide (DWG) has a longitudinal dielectric core member. The core member has a first dielectric constant value. A cladding surrounds the dielectric core member and has a second dielectric constant value that is lower than the first dielectric constant. A portion of the DWG is configured as a corner having a radius. A conductive layer formed on an outer radius of the corner.

Abstract translation: 电介质波导（DWG）具有纵向介质芯构件。 芯构件具有第一介电常数值。 包层围绕介质芯构件并具有低于第一介电常数的第二介电常数值。 DWG的一部分被配置为具有半径的角。 形成在拐角的外半径上的导电层。

公开(公告)号：US09219296B2

公开(公告)日：2015-12-22

申请号：US13854947

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Robert Floyd Payne ,  Gerd Schuppener ,  Baher Haroun

IPC: H01P5/107 ,  H01P3/16 ,  H01P5/08 ,  G02B6/44 ,  H01P11/00 ,  H01P5/00 ,  H01Q1/50 ,  H01Q19/10 ,  H04B1/40 ,  H01Q19/30 ,  H01P3/12

CPC classification number: H01P3/16 ,  G02B6/4416 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/165 ,  H01P5/00 ,  H01P5/087 ,  H01P5/107 ,  H01P5/184 ,  H01P11/001 ,  H01P11/002 ,  H01Q1/50 ,  H01Q19/108 ,  H01Q19/30 ,  H04B1/40 ,  Y10T29/49016 ,  Y10T29/49826

Abstract: A metallic waveguide is mounted on a multilayer substrate. The metallic waveguide has an open end formed by a top, bottom and sides configured to receive a core member of a dielectric waveguide, and an opposite tapered end formed by declining the top of the metallic waveguide past the bottom of the metallic waveguide and down to contact the multilayer substrate. A pinnacle of the tapered end is coupled to the ground plane element, and the bottom side of the metallic waveguide is in contact with the multiplayer substrate and coupled to the microstrip line.

Abstract translation: 金属波导安装在多层基板上。 金属波导具有由顶部，底部和侧面形成的开口端，该开口端被配置为容纳电介质波导的芯构件，并且相反的锥形端通过使金属波导的顶部通过金属波导的底部下降到 接触多层基板。 锥形末端的顶点耦合到接地平面元件，并且金属波导的底侧与多人基板接触并耦合到微带线。

公开(公告)号：US20150295305A1

公开(公告)日：2015-10-15

申请号：US14585724

申请日：2014-12-30

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Matthew David Romig

IPC: H01Q1/40 ,  H01L23/50 ,  H01L21/78 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/495 ,  H01L23/66

CPC classification number: H01Q1/40 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/495 ,  H01L23/49517 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30111 ,  H01Q9/0407 ,  H01Q9/16 ,  H01Q19/108 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/45099

Abstract: An encapsulated integrated circuit has transceiver circuitry operable to produce and/or receive a radio frequency (RF) signal, wherein bond pads on the IC die are coupled to the transceiver input/output (IO) circuitry. An antenna structure is coupled to the IO circuitry via the bond pads. Mold material encapsulates the IC die and the antenna structure, wherein the antenna structure is positioned so as to be approximately in alignment with a core of a dielectric waveguide positioned adjacent the encapsulated IC.

Abstract translation: 封装的集成电路具有可操作以产生和/或接收射频（RF）信号的收发器电路，其中IC管芯上的​​接合焊盘耦合到收发器输入/输出（IO）电路。 天线结构通过接合焊盘耦合到IO电路。 模具材料封装IC芯片和天线结构，其中天线结构被定位成与位于封装IC附近的电介质波导的芯大致对准。