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    INFLATION TYPE CERVICAL VERTEBRAE REHABILITATION DEVICE AND METHOD FOR USING THE SAME
    12.
    发明申请
    INFLATION TYPE CERVICAL VERTEBRAE REHABILITATION DEVICE AND METHOD FOR USING THE SAME 审中-公开
    充气式椎间盘骨修复装置及其使用方法

    公开(公告)号：US20110172579A1

    公开(公告)日：2011-07-14

    申请号：US12977619

    申请日：2010-12-23

    Applicant: CHING-HUA CHIU ,  LI-WEI CHOU

    Inventor： CHING-HUA CHIU ,  LI-WEI CHOU

    IPC: A61F5/00

    CPC classification number: A61F5/055 ,  A61F5/012 ,  A61N5/0625 ,  A61N2005/066

    Abstract: An inflation type cervical vertebrae rehabilitation device includes at least one cervical vertebrae cell, a head cell connected to the at least one cervical vertebrae cell, an electric inflation portion and a control portion. The method includes a preparing step, a setting inflation processes step, an inflating step, and a completion step. One or more cervical vertebrae cells are inflatable and positioned between a support position and an operation position to support and rehabilitate the user's neck. The head cell is provided to support the user's head. So, the cervical vertebrae cells can support the user's head and neck with rehabilitation functions. The head cell is an auxiliary for support the user's head. It is easy to carry. This invention could be remote controlled. It contains the far infra-red heating function. In addition, there is a pose balance feature.

    Abstract translation: 膨胀型颈椎修复装置包括至少一个颈椎细胞，连接到至少一个颈椎细胞的头细胞，电充气部分和控制部分。 该方法包括准备步骤，设定充气过程步骤，充气步骤和完成步骤。 一个或多个颈椎细胞可充气并且定位在支撑位置和操作位置之间以支撑和恢复使用者的颈部。 提供头单元以支持用户的头部。 因此，颈椎细胞可以支持用户的头颈部康复功能。 头单元是用于支持用户头部的辅助装置。 很容易携带 本发明可以被远程控制。 它包含远红外线加热功能。 另外还有姿势平衡功能。

    High efficiency light emitting diodes
    14.
    发明授权
    High efficiency light emitting diodes 有权
    高效率发光二极管

    公开(公告)号：US08618564B2

    公开(公告)日：2013-12-31

    申请号：US12898500

    申请日：2010-10-05

    Applicant: Jung-Tang Chu ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    Inventor： Jung-Tang Chu ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    IPC: H01L33/20 ,  H01L33/46

    CPC classification number: H01L33/20 ,  H01L33/007 ,  H01L33/46

    Abstract: The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light.

    Abstract translation: 本公开涉及高效率发光二极管器件及其制造方法。 根据一个或多个实施例，发光二极管器件包括具有形成在其表面上的一个或多个凹陷特征的基底和形成为覆盖一个或多个凹陷特征的一个或多个全向反射器。 在基板的表面上形成发光二极管层以覆盖全向反射器。 一个或多个全向反射器适于有效地反射光。

    Etching growth layers of light emitting devices to reduce leakage current
    15.
    发明授权
    Etching growth layers of light emitting devices to reduce leakage current 有权
    蚀刻生长层的发光器件，以减少漏电流

    公开(公告)号：US08592242B2

    公开(公告)日：2013-11-26

    申请号：US12949316

    申请日：2010-11-18

    Applicant: Hung-Wen Huang ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    Inventor： Hung-Wen Huang ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    IPC: H01L21/00

    CPC classification number: H01L33/22 ,  H01L33/007 ,  H01L33/20

    Abstract: The present disclosure relates to methods for fabricating LEDs by patterning and etching an n-doped epitaxial layer to form regions of roughened surface of the n-doped layer and mesa structures adjacent to the roughened surface regions before depositing an active layer and the rest of the epitaxial layers on the mesa structures. The method includes growing epitaxial layers of an LED including an un-doped layer and an n-doped layer on a wafer of growth substrate. The method also includes patterning the n-doped layer to form a first region of the n-doped layer and a mesa region of the n-doped layer adjacent to the first region. The method further includes etching the first region of the n-doped layer to create a roughened surface. The method further includes growing additional epitaxial layers of the LED including an active layer and a p-doped layer on the mesa region of the n-doped layer.

    Abstract translation: 本公开涉及通过图案化和蚀刻n掺杂外延层来形成LED的方法，以在沉积有源层之前形成n掺杂层和邻近粗糙化表面区域的台面结构的粗糙表面的区域，并且其余部分 外延层在台面结构上。 该方法包括在生长衬底的晶片上生长包括未掺杂层和n掺杂层的LED的外延层。 该方法还包括图案化n掺杂层以形成n掺杂层的第一区域和与第一区域相邻的n掺杂层的台面区域。 该方法还包括蚀刻n掺杂层的第一区域以产生粗糙表面。 该方法还包括增加LED的附加外延层，其包括n掺杂层的台面区域上的有源层和p掺杂层。

    Method to remove sapphire substrate
    16.
    发明授权
    Method to remove sapphire substrate 有权
    去除蓝宝石衬底的方法

    公开(公告)号：US08563334B2

    公开(公告)日：2013-10-22

    申请号：US12881457

    申请日：2010-09-14

    Applicant: Hung-Wen Huang ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    Inventor： Hung-Wen Huang ,  Hsing-Kuo Hsia ,  Ching-Hua Chiu

    IPC: H01L21/3065 ,  H01L21/66 ,  H01L21/306

    CPC classification number: H01L33/0079 ,  H01L33/0095 ,  H01L33/405

    Abstract: A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.

    Abstract translation: 发光二极管（LED）形成在通过研磨然后蚀刻蓝宝石衬底而从LED除去的蓝宝石衬底上。 使用单一研磨剂或多个研磨剂将蓝宝石衬底首先研磨至第一指定厚度。 通过干蚀刻或湿法蚀刻去除剩余的蓝宝石衬底。

    OPTIMIZING LIGHT EXTRACTION EFFICIENCY FOR AN LED WAFER
    17.
    发明申请
    OPTIMIZING LIGHT EXTRACTION EFFICIENCY FOR AN LED WAFER 有权
    优化LED散热的光提取效率

    公开(公告)号：US20130260484A1

    公开(公告)日：2013-10-03

    申请号：US13431165

    申请日：2012-03-27

    Applicant: Chyi-Shyuan Chern ,  Hsin-Hsien Wu ,  Yung-Hsin Yang ,  Ching-Hua Chiu

    Inventor： Chyi-Shyuan Chern ,  Hsin-Hsien Wu ,  Yung-Hsin Yang ,  Ching-Hua Chiu

    IPC: H01L21/66

    CPC classification number: H01L22/12 ,  H01L22/20 ,  H01L33/0095 ,  H01L33/22

    Abstract: The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters.

    Abstract translation: 本发明涉及一种制造发光二极管（LED）晶片的方法。 该方法首先确定LED晶片的目标表面形态。 目标表面形态为LED晶圆上的LED产生最大的光输出。 蚀刻LED晶片以形成粗糙的晶片表面。 此后，使用激光扫描显微镜，该方法研究了LED晶片的实际表面形态。 此后，如果实际的表面形态与目标表面形态不同，超过可接受的极限，则该方法重复一次或多次蚀刻步骤。 通过调整一个或多个蚀刻参数重复蚀刻。

    NANO-PATTERNED SUBSTRATE AND EPITAXIAL STRUCTURE
    20.
    发明申请
    NANO-PATTERNED SUBSTRATE AND EPITAXIAL STRUCTURE 审中-公开
    纳米图案和外延结构

    公开(公告)号：US20110024880A1

    公开(公告)日：2011-02-03

    申请号：US12846364

    申请日：2010-07-29

    Applicant: Zhen-Yu Li ,  Ching-Hua Chiu ,  Hao-Chung Kuo ,  Tien-Chang Lu

    Inventor： Zhen-Yu Li ,  Ching-Hua Chiu ,  Hao-Chung Kuo ,  Tien-Chang Lu

    IPC: H01L29/06 ,  H01L21/20

    CPC classification number: H01L33/24 ,  H01L21/02439 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/22

    Abstract: A nano-patterned substrate includes a plurality of nano-particles or nanopillars on an upper surface thereof. A ratio of height to diameter of each of the nano-particles or each of the nanopillars is either greater than or equal to 1. Particularly, a ratio of height to diameter of the nanopillars is greater than or equal to 5. Each of the nano-particles or each of the nanopillars has an arc-shaped top surface. When an epitaxial growth process is applied onto the nano-patterned substrate to form an epitaxial layer, the epitaxial layer has very low defect density. Thus, a production yield of fabricating the subsequent device can be improved.

    Abstract translation: 纳米图案基板在其上表面上包括多个纳米颗粒或纳米柱。 每个纳米颗粒或每个纳米颗粒的高度与直径的比率大于或等于1.特别地，纳米柱的高度与直径之比大于或等于5.每个纳米颗粒 颗粒或每个纳米柱具有弧形顶表面。 当将外延生长工艺施加到纳米图案化衬底上以形成外延层时，外延层具有非常低的缺陷密度。 因此，可以提高制造后续装置的产量。

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