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    NANO-PATTERNED SUBSTRATE AND EPITAXIAL STRUCTURE
    1.
    发明申请
    NANO-PATTERNED SUBSTRATE AND EPITAXIAL STRUCTURE 审中-公开
    纳米图案和外延结构

    公开(公告)号：US20110024880A1

    公开(公告)日：2011-02-03

    申请号：US12846364

    申请日：2010-07-29

    申请人： Zhen-Yu Li ,  Ching-Hua Chiu ,  Hao-Chung Kuo ,  Tien-Chang Lu

    发明人： Zhen-Yu Li ,  Ching-Hua Chiu ,  Hao-Chung Kuo ,  Tien-Chang Lu

    IPC分类号： H01L29/06 ,  H01L21/20

    CPC分类号： H01L33/24 ,  H01L21/02439 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/22

    摘要： A nano-patterned substrate includes a plurality of nano-particles or nanopillars on an upper surface thereof. A ratio of height to diameter of each of the nano-particles or each of the nanopillars is either greater than or equal to 1. Particularly, a ratio of height to diameter of the nanopillars is greater than or equal to 5. Each of the nano-particles or each of the nanopillars has an arc-shaped top surface. When an epitaxial growth process is applied onto the nano-patterned substrate to form an epitaxial layer, the epitaxial layer has very low defect density. Thus, a production yield of fabricating the subsequent device can be improved.

    摘要翻译： 纳米图案基板在其上表面上包括多个纳米颗粒或纳米柱。 每个纳米颗粒或每个纳米颗粒的高度与直径的比率大于或等于1.特别地，纳米柱的高度与直径之比大于或等于5.每个纳米颗粒 颗粒或每个纳米柱具有弧形顶表面。 当将外延生长工艺施加到纳米图案化衬底上以形成外延层时，外延层具有非常低的缺陷密度。 因此，可以提高制造后续装置的产量。

    Growing an improved P-GaN layer of an LED through pressure ramping
    3.
    发明授权
    Growing an improved P-GaN layer of an LED through pressure ramping 有权
    通过压力斜坡生长LED的改进的P-GaN层

    公开(公告)号：US09312432B2

    公开(公告)日：2016-04-12

    申请号：US13418663

    申请日：2012-03-13

    申请人： Ming-Hua Lo ,  Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    发明人： Ming-Hua Lo ,  Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    IPC分类号： H01L33/36 ,  H01L33/32 ,  H01L33/02 ,  H01L33/00

    CPC分类号： H01L33/025 ,  H01L33/007 ,  H01L33/325 ,  H01L33/36

    摘要： The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.

    摘要翻译： 本公开涉及一种装置。 该装置包括包括发光二极管（LED）裸片的光子管芯结构。 在一些实施例中，LED管芯是垂直LED管芯。 LED管芯包括衬底。 p型掺杂的III-V化合物层和n掺杂的III-V化合物层分别设置在衬底上。 在P掺杂的III-V化合物层和n掺杂的III-V化合物层之间设置多量子阱（MQW）层。 p掺杂的III-V化合物层包括具有非指数掺杂浓度特性的第一区域和具有指数掺杂浓度特性的第二区域。 在一些实施例中，使用比第一区域更低的压力形成第二区域。

    GROWING AN IMPROVED P-GAN LAYER OF AN LED THROUGH PRESSURE RAMPING
    5.
    发明申请
    GROWING AN IMPROVED P-GAN LAYER OF AN LED THROUGH PRESSURE RAMPING 有权
    通过压力波动增加LED改进的P-GAN层

    公开(公告)号：US20130240831A1

    公开(公告)日：2013-09-19

    申请号：US13418663

    申请日：2012-03-13

    申请人： Ming-Hua Lo ,  Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    发明人： Ming-Hua Lo ,  Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    IPC分类号： H01L33/06 ,  H01L33/32

    CPC分类号： H01L33/025 ,  H01L33/007 ,  H01L33/325 ,  H01L33/36

    摘要： The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.

    摘要翻译： 本公开涉及一种装置。 该装置包括包括发光二极管（LED）裸片的光子管芯结构。 在一些实施例中，LED管芯是垂直LED管芯。 LED管芯包括衬底。 p型掺杂的III-V化合物层和n掺杂的III-V化合物层分别设置在衬底上。 在P掺杂的III-V化合物层和n掺杂的III-V化合物层之间设置多量子阱（MQW）层。 p掺杂的III-V化合物层包括具有非指数掺杂浓度特性的第一区域和具有指数掺杂浓度特性的第二区域。 在一些实施例中，使用比第一区域更低的压力形成第二区域。

    LED WITH EMBEDDED DOPED CURRENT BLOCKING LAYER
    6.
    发明申请
    LED WITH EMBEDDED DOPED CURRENT BLOCKING LAYER 审中-公开
    LED嵌入式DOPED电流阻塞层

    公开(公告)号：US20130221320A1

    公开(公告)日：2013-08-29

    申请号：US13405906

    申请日：2012-02-27

    申请人： Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    发明人： Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    IPC分类号： H01L33/04

    CPC分类号： H01L33/145 ,  H01L21/2654

    摘要： The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a plurality of layers. A current blocking layer is embedded in one of the plurality of layers. The current blocking layer is a doped layer. The present disclosure also involves a method of fabricating a light-emitting diode (LED). As a part of the method, an LED is provided. The LED includes a plurality of layers. A patterned mask is then formed over the LED. The patterned mask contains an opening. A dopant is introduced through the opening to a layer of the LED through either an ion implantation process or a thermal diffusion process. As a result of the dopant being introduced, a doped current blocking component is formed to be embedded within the layer of the LED.

    摘要翻译： 本公开涉及一种装置。 该装置包括包含多个层的光子管芯结构。 电流阻挡层嵌入在多个层之一中。 电流阻挡层是掺杂层。 本公开还涉及一种制造发光二极管（LED）的方法。 作为该方法的一部分，提供LED。 LED包括多个层。 然后在LED上形成图案化掩模。 图案面具包含开口。 通过离子注入工艺或热扩散工艺将掺杂剂通过开口引入LED层。 作为引入掺杂剂的结果，形成掺杂电流阻挡组分以嵌入LED的层内。

    III-V Group Compound Devices with Improved Efficiency and Droop Rate
    8.
    发明申请
    III-V Group Compound Devices with Improved Efficiency and Droop Rate 有权
    具有提高效率和下降率的III-V组复合器件

    公开(公告)号：US20140077152A1

    公开(公告)日：2014-03-20

    申请号：US13616299

    申请日：2012-09-14

    申请人： Zhen-Yu Li ,  Hon-Way Lin ,  Chung-Pao Lin ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    发明人： Zhen-Yu Li ,  Hon-Way Lin ,  Chung-Pao Lin ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    IPC分类号： H01L33/06

    CPC分类号： H01L33/06 ,  B82Y20/00 ,  F21K9/00 ,  F21S6/00 ,  F21V3/049 ,  F21V7/22 ,  F21V29/74 ,  F21Y2115/10 ,  F21Y2115/30 ,  H01L21/02458 ,  H01L21/02507 ,  H01L33/0025 ,  H01L33/12 ,  H01L33/145 ,  H01L33/32 ,  H01S5/0014 ,  H01S5/3407 ,  H01S5/34333

    摘要： The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.

    摘要翻译： 本公开涉及一种照明装置。 照明装置包括n掺杂半导体化合物层，与n掺杂半导体化合物层间隔开的p掺杂半导体化合物层和设置在第一半导体化合物层和第二半导体化合物层之间的多量子阱（MQW） 半导体复合层。 MQW包括多个交替的第一和第二层。 MQW的第一层具有基本均匀的厚度。 第二层相对于与p掺杂半导体化合物层的距离具有渐变厚度。 位于与p掺杂半导体化合物层最相邻的第二层的子集中掺杂有p型掺杂剂。 掺杂的第二层具有相对于从p掺杂半导体层的距离而变化的渐变掺杂浓度水平。

    METHOD OF GROWING A HIGH QUALITY III-V COMPOUND LAYER ON A SILICON SUBSTRATE
    10.
    发明申请
    METHOD OF GROWING A HIGH QUALITY III-V COMPOUND LAYER ON A SILICON SUBSTRATE 有权
    在硅基材上生长高品质III-V复合层的方法

    公开(公告)号：US20130214281A1

    公开(公告)日：2013-08-22

    申请号：US13398954

    申请日：2012-02-17

    申请人： Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    发明人： Zhen-Yu Li ,  Hsing-Kuo Hsia ,  Hao-Chung Kuo

    IPC分类号： H01L29/20 ,  H01L21/20

    CPC分类号： H01L21/0254 ,  H01L21/02052 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0262 ,  H01L29/1075 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787 ,  H01L33/007 ,  H01L33/12

    摘要： The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlxGa1−xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.

    摘要翻译： 本公开涉及制造半导体器件的方法。 清洁硅晶片的表面。 然后在硅晶片上外延生长第一缓冲层。 第一缓冲层含有氮化铝（AlN）材料。 然后在第一缓冲层上外延生长第二缓冲层。 第二缓冲层包括多个氮化镓铝（Al x Ga 1-x N）子层。 每个子层具有在0和1之间的x的相应值。每个子层的x的值是其在第二缓冲层内的位置的函数。 在第二缓冲层上外延生长第一氮化镓（GaN）层。 然后在第一GaN层上外延生长第三缓冲层。 然后在第三缓冲层上外延生长第二GaN层。