公开(公告)号：US20200312874A1

公开(公告)日：2020-10-01

申请号：US16833899

申请日：2020-03-30

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Tomohiko Kitajima ,  Mukund Srinivasan ,  Sanjay Natarajan

IPC: H01L27/11582 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/677

Abstract: Methods of manufacturing memory devices are provided. The methods decrease the thickness of the first layers and increase the thickness of the second layers. Semiconductor devices are described having a film stack comprising alternating nitride and second layers in a first portion of the device, the alternating nitride and second layers of the film stack having a nitride:oxide thickness ratio (Nf:Of); and a memory stack comprising alternating word line and second layers in a second portion of the device, the alternating word line and second layers of the memory stack having a word line:oxide thickness ratio (Wm:Om), wherein 0.1(Wm:Om)

公开(公告)号：US10734265B2

公开(公告)日：2020-08-04

申请号：US16016767

申请日：2018-06-25

Applicant: Applied Materials, Inc.

Inventor： Karthik Janakiraman ,  Hari K. Ponnekanti ,  Juan Carlos Rocha ,  Mukund Srinivasan

IPC: H01L21/677

Abstract: A system for processing a substrate is provided including a first planar motor, a substrate carrier, a first processing chamber, and a first lift. The first planar motor includes a first arrangement of coils disposed along a first horizontal direction, a top surface parallel to the first horizontal direction, a first side, a second side. The substrate carrier has a substrate supporting surface parallel to the first horizontal direction. The first processing chamber has an opening to receive a substrate disposed on the substrate carrier. The first lift includes a second planar motor having a second arrangement of coils disposed along the first horizontal direction. A top surface top surface of the second planar motor is parallel to the first horizontal direction. The first lift is configured to move the top surface of the second planar motor between a first vertical location and a second vertical location.

公开(公告)号：US20150187563A1

公开(公告)日：2015-07-02

申请号：US14580621

申请日：2014-12-23

Applicant: Applied Materials, Inc.

Inventor： BRIAN SAXTON UNDERWOOD ,  Abhijit Basu Mallick ,  Mukund Srinivasan ,  Juan Carlos Rocha-Alvarez

IPC: H01L21/02 ,  H01L21/324

CPC classification number: H01L21/0262 ,  C23C16/401 ,  C23C16/482 ,  C23C16/54 ,  C23C16/56 ,  H01J11/36 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/324

Abstract: A method and apparatus for forming a flowable film are described. The method includes providing an oxygen free precursor gas mixture to a processing chamber containing a substrate. The oxygen free precursor gas is activated by exposure to UV radiation in the processing chamber. Molecular fragments resulting from the UV activation are encouraged to deposit on the substrate to form a flowable film on the substrate. The substrate may be cooled to encourage deposition. The film may be hardened by heating and/or by further exposure to UV radiation.

Abstract translation: 描述了一种用于形成可流动膜的方法和装置。 该方法包括向含有基底的处理室提供无氧的前体气体混合物。 无氧前体气体通过在处理室中暴露于UV辐射而被活化。 鼓励由UV激活产生的分子片段沉积在基底上以在基底上形成可流动的膜。 衬底可以被冷却以促进沉积。 可以通过加热和/或通过进一步暴露于UV辐射来使膜硬化。

公开(公告)号：US20230164993A1

公开(公告)日：2023-05-25

申请号：US18055058

申请日：2022-11-14

Applicant: Applied Materials, Inc.

Inventor： Chang Seok Kang ,  Tomohiko Kitajima ,  Gill Yong Lee ,  Balasubramanian Pranatharthiharan ,  Mukund Srinivasan

IPC: H01L27/11578 ,  G11C5/06 ,  H01L27/1157

CPC classification number: H01L27/11578 ,  G11C5/063 ,  H01L27/1157

Abstract: Described is a memory device including a plurality of memory cells formed around a memory hole extending through a memory stack on a substrate. Each of the plurality of memory cells comprises a discrete blocking oxide layer, a charge trap layer, and a tunnel oxide layer. The blocking oxide layer is discrete between each of the plurality of memory cells. The tunnel oxide layer is continuous between each of the plurality of memory cells, and the charge trap layer is discrete between each of the plurality of memory cells. The charge trap layer has a first thickness on a top portion and a second thickness on a center portion, the first thickness different than the second thickness.

公开(公告)号：US11545504B2

公开(公告)日：2023-01-03

申请号：US17228034

申请日：2021-04-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Takehito Koshizawa ,  Mukund Srinivasan ,  Tomohiko Kitajima ,  Chang Seok Kang ,  Sung-Kwan Kang ,  Gill Y. Lee ,  Susmit Singha Roy

IPC: H01L27/1157 ,  H01L27/11582

Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.

公开(公告)号：US20190385851A1

公开(公告)日：2019-12-19

申请号：US16444856

申请日：2019-06-18

Applicant: Applied Materials, Inc.

Inventor： SRINIVAS GANDIKOTA ,  Abhijit Basu Mallick ,  Swaminathan Srinivasan ,  Rui Cheng ,  Susmit Singha Roy ,  Gaurav Thareja ,  Mukund Srinivasan ,  Sanjay Natarajan

IPC: H01L21/225 ,  H01L21/30 ,  H01L21/02 ,  H01L21/67

Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

公开(公告)号：US10475644B2

公开(公告)日：2019-11-12

申请号：US15959646

申请日：2018-04-23

Applicant: Applied Materials, Inc.

Inventor： Xinhai Han ,  Nagarajan Rajagopalan ,  Sung Hyun Hong ,  Bok Hoen Kim ,  Mukund Srinivasan

IPC: H01L21/02 ,  H01L27/11556 ,  H01L27/11582

Abstract: A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

公开(公告)号：US10403535B2

公开(公告)日：2019-09-03

申请号：US14824229

申请日：2015-08-12

Applicant: Applied Materials, Inc.

Inventor： Zheng John Ye ,  Jay D. Pinson, II ,  Hiroji Hanawa ,  Jianhua Zhou ,  Xing Lin ,  Ren-Guan Duan ,  Kwangduk Douglas Lee ,  Bok Hoen Kim ,  Swayambhu P. Behera ,  Sungwon Ha ,  Ganesh Balasubramanian ,  Juan Carlos Rocha-Alvarez ,  Prashant Kumar Kulshreshtha ,  Jason K. Foster ,  Mukund Srinivasan ,  Uwe P. Haller ,  Hari K. Ponnekanti

IPC: H02N13/00 ,  H01L21/683 ,  H01L21/687

Abstract: Embodiments of the present disclosure provide an electrostatic chuck for maintaining a flatness of a substrate being processed in a plasma reactor at high temperatures. In one embodiment, the electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, and the chuck body has a volume resistivity value of about 1×107 ohm-cm to about 1×1015 ohm-cm in a temperature of about 250° C. to about 700° C., and an electrode embedded in the body, the electrode is coupled to a power supply. In one example, the chuck body is composed of an aluminum nitride material which has been observed to be able to optimize chucking performance around 600° C. or above during a deposition or etch process, or any other process that employ both high operating temperature and substrate clamping features.

公开(公告)号：US20180155834A1

公开(公告)日：2018-06-07

申请号：US15827498

申请日：2017-11-30

Applicant: Applied Materials, Inc.

Inventor： Mukund Srinivasan ,  Hari Ponnekanti ,  Joseph Yudovsky ,  Alexander S. Polyak

IPC: C23C16/455 ,  H01L21/285 ,  H01L21/67 ,  H01L21/02

CPC classification number: C23C16/45544 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/45551 ,  C23C16/4583 ,  C23C16/54 ,  H01L21/02005 ,  H01L21/28562 ,  H01L21/67098 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/68764 ,  H01L21/68771

Abstract: Processing platforms having a central transfer station with a robot, a first batch processing chamber connected to a first side of the central transfer station and a first single wafer processing chamber connected to a second side of the central transfer station, where the first batch processing chamber configured to process x wafers at a time for a batch time and the first single wafer processing chamber configured to process a wafer for about 1/x of the batch time. Methods of using the processing platforms and processing a plurality of wafers are also described.

公开(公告)号：US20160020089A1

公开(公告)日：2016-01-21

申请号：US14333262

申请日：2014-07-16

Applicant: Applied Materials, Inc.

Inventor： Kiran V. Thadani ,  Jingmei Liang ,  Young S. Lee ,  Mukund Srinivasan

IPC: H01L21/02

CPC classification number: H01L21/02126 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02274

Abstract: Methods are described for forming a flowable low-k dielectric layer on a patterned substrate. The film may be a silicon-carbon-oxygen (Si—C—O) layer in which the silicon and carbon constituents come from a silicon and carbon containing precursor while the oxygen may come from an oxygen-containing precursor activated in a remote plasma region. A similarly deposited silicon oxide layer may be deposited first to improve the gapfill capabilities. Alternatively, or in combination, the flow of a silicon-and-carbon-containing precursor may be reduced during deposition to change the properties from low-k to high strength roughly following the filling of features of the patterned substrate.

Abstract translation: 描述了在图案化衬底上形成可流动的低k电介质层的方法。 该膜可以是硅 - 碳 - 氧（Si-C-O）层，其中硅和碳成分来自含硅和碳的前体，而氧可以来自在远程等离子体区域中激活的含氧前体 。 可以首先沉积类似沉积的氧化硅层以改善间隙填充能力。 或者或组合地，可以在沉积期间减少含硅和碳的前体的流动，以便在填充图案化衬底的特征之后将性质从低k改变为高强度。