公开(公告)号：US11996289B2

公开(公告)日：2024-05-28

申请号：US17141360

申请日：2021-01-05

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Joe Margetis ,  Xin Sun ,  David Kohen ,  Dieter Pierreux

IPC: C23C16/24 ,  C23C16/08 ,  C23C16/42 ,  C23C16/455 ,  C23C16/52 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/45523 ,  C23C16/52 ,  C30B25/165 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696

Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

公开(公告)号：US10510536B2

公开(公告)日：2019-12-17

申请号：US15940801

申请日：2018-03-29

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  John Tolle

IPC: H01L21/02 ,  H01L23/12

Abstract: Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550° C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.

公开(公告)号：US20190237327A1

公开(公告)日：2019-08-01

申请号：US15886225

申请日：2018-02-01

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  Nupur Bhargava ,  John Tolle ,  Vijay D'Costa

IPC: H01L21/02 ,  H01L29/165

Abstract: A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.

公开(公告)号：US20180190793A1

公开(公告)日：2018-07-05

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223

CPC classification number: H01L21/225 ,  H01L21/223 ,  H01L21/2251 ,  H01L21/2256 ,  H01L21/385 ,  H01L21/76858 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/66666

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

公开(公告)号：US20240274437A1

公开(公告)日：2024-08-15

申请号：US18644475

申请日：2024-04-24

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Joe Margetis ,  Xin Sun ,  David Kohen ,  Dieter Pierreux

IPC: H01L21/02 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/455 ,  C23C16/52 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/45523 ,  C23C16/52 ,  C30B25/165 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696

Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

公开(公告)号：US20230145240A1

公开(公告)日：2023-05-11

申请号：US18147916

申请日：2022-12-29

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/455

CPC classification number: H01L21/02576 ,  H01L21/02661 ,  H01L29/0847 ,  H01L29/66795 ,  H01L21/02532 ,  C23C16/4583 ,  C23C16/0227 ,  C23C16/30 ,  H01L21/02639 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/0209 ,  C23C16/455 ,  H01L21/0262 ,  H01L21/02609

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US20210035802A1

公开(公告)日：2021-02-04

申请号：US16932275

申请日：2020-07-17

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US20190304780A1

公开(公告)日：2019-10-03

申请号：US15940801

申请日：2018-03-29

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  John Tolle

IPC: H01L21/02 ,  H01L23/12

Abstract: Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550° C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.

公开(公告)号：US20190131124A1

公开(公告)日：2019-05-02

申请号：US15798201

申请日：2017-10-30

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  Harald Benjamin Profijt ,  Andrew Kretzschmar

IPC: H01L21/02 ,  H01L29/165

Abstract: A method for forming a forming a semiconductor structure is disclosed. The method may include: forming a silicon oxide layer on a surface of a substrate, depositing a silicon germanium (Si1-xGex) seed layer directly on the silicon oxide layer, and depositing a germanium (Ge) layer directly on the silicon germanium (Si1-xGex) seed layer. Semiconductor structures including a germanium (Ge) layer deposited on silicon oxide utilizing an intermediate silicon germanium (Si1-xGex) seed layer are also disclosed.

公开(公告)号：US20190067004A1

公开(公告)日：2019-02-28

申请号：US15683701

申请日：2017-08-22

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  Harald Benjamin Profijt

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/285 ,  H01L21/768 ,  H01L29/165 ,  H01L29/08 ,  H01L29/78 ,  H01L29/06 ,  H01L29/45 ,  H01L23/535 ,  C30B29/52 ,  C30B25/02 ,  C23C16/06

Abstract: A method for depositing a germanium tin (Ge1-xSnx) semiconductor is disclosed. The method may include; providing a substrate within a reaction chamber, heating the substrate to a deposition temperature and exposing the substrate to a germanium precursor and a tin precursor. The method may further include; depositing a germanium tin (Ge1-xSnx) semiconductor on the surface of the substrate, and exposing the germanium tin (Ge1-xSnx) semiconductor to a boron dopant precursor. Semiconductor device structures including a germanium tin (Ge1-xSnx) semiconductor formed by the methods of the disclosure are also provided.