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11.发明授权公开(公告)号：US07433674B2
公开(公告)日：2008-10-07
申请号：US11559918
申请日：2006-11-15
申请人： Eric A. Johnson , Mark J. Handzel
发明人： Eric A. Johnson , Mark J. Handzel
IPC分类号： H04M11/00
CPC分类号： H04W12/12 , H04L63/1416 , H04L63/1425 , H04M3/38 , H04M15/00 , H04M15/41 , H04M15/47 , H04M15/88 , H04M15/887 , H04M17/00 , H04M2203/6027 , H04M2215/0116 , H04M2215/014 , H04M2215/0148 , H04M2215/0164 , H04M2215/32 , H04W4/24 , H04W12/06 , H04W60/00
摘要： The present invention provides an apparatus for credit based management of a telecommunication system. One embodiment of the apparatus includes an interface for communicating credit information on a particular subscriber and for receiving call records for the particular subscriber that are derived from a switch which establishes connections between telecommunication devices. A credit limit device then utilizes the credit information to establish a credit limit for the subscriber. The apparatus also includes a device for comparing the particular subscriber's call usage to a credit limit established for the subscriber based on information obtained from the credit bureau. An output device is used to provide an indication that the subscriber has exceeded their credit limit. Another embodiment of the apparatus, includes a device for, upon expiration of a predetermined time period, contacting the credit bureau to obtain a new credit score for a subscriber and use this score to update the subscriber's credit limit.
摘要翻译： 本发明提供了一种用于电信系统的信用管理的装置。 该装置的一个实施例包括用于在特定订户上传送信用信息的接口，以及用于接收从建立电信设备之间的连接的交换机导出的特定用户的呼叫记录。 信用限额设备然后利用信用信息为用户建立信用限额。 该装置还包括一个装置，用于根据从信用局获得的信息将特定用户的呼叫使用量与为用户建立的信用限额进行比较。 输出设备用于提供用户已经超过其信用限额的指示。 该装置的另一实施例包括一种装置，用于在预定时间段期满后，联系信用局以获得用户的新信用评分，并使用该分数来更新用户的信用限额。
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公开(公告)号：US20080194418A1
公开(公告)日：2008-08-14
申请号：US11914099
申请日：2006-05-10
申请人： Eric A. Johnson , Guowen Liu , Michael R. Miller
发明人： Eric A. Johnson , Guowen Liu , Michael R. Miller
CPC分类号： C12Q1/683 , C12Q2563/131 , C12Q2533/101 , C12Q2525/191 , C12Q2565/501
摘要： Described herein are methods for the high-throughput discovery and genotyping of nucleotide polymorphisms in DNA, including single nucleotide polymorphism (SNPs) and short deletions and insertions. These methods take advantage of the fact that differences in DNA sequence result in the differential presence of restriction endonuclease digestion sites. Differences can be detected between individuals, or the relative presence detected in a population. Provided approaches involve isolation of short DNA fragments (“tags) near restriction endonuclease sites. The presence of one (or two) of these tags indicates that a site was present. Distinguishable labeling of tags from two individual or populations allows comparative presence of these sites to be assayed on a platform that employs a collection of nucleic acids. Other approaches depend on the differential presence of restriction endonuclease sites, but involve mixing genomic DNA from the two individuals. Regions of DNA with a restriction site in only one individual create an opportunity for primer extension to produce labeled material, which can be assayed on a platform that employs a collection of nucleic acids. Any of a variety of detection platforms can be use with the described approaches. By way of example, highly efficient variant detection microarrays and bead libraries are provided that contain genomic tags with different representations between two populations, so that most elements in the collection of nucleic acids contain an informative SNP between the populations of interest.
摘要翻译： 本文描述了DNA的核苷酸多态性的高通量发现和基因分型的方法，包括单核苷酸多态性（SNPs）和短缺失和插入。 这些方法利用DNA序列的差异导致限制性内切核酸酶消化位点的差异存在的事实。 可以在个体之间检测差异，或在群体中检测到相对存在。 提供的方法包括在限制性内切核酸酶位点附近分离短DNA片段（“标签”），一个（或两个）这些标签的存在表明存在一个位点。来自两个个体或群体的标签的区分标签允许这些位点的比较存在 在采用核酸集合的平台上进行检测其他方法取决于限制性内切核酸酶位点的差异存在，但涉及混合来自两个个体的基因组DNA。仅在一个个体中具有限制性位点的DNA区域产生机会 用于引物延伸以产生标记的物质，其可以在采用核酸集合的平台上进行测定。多种检测平台中的任何一种可以与所述方法一起使用。作为示例，高效变体检测微阵列和珠粒 提供了包含两个群体之间具有不同表征的基因组标签的文库，因此大多数 核酸集合中的元素包含感兴趣的群体之间的信息性SNP。
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公开(公告)号：US07067916B2
公开(公告)日：2006-06-27
申请号：US09885853
申请日：2001-06-20
申请人： William E. Bernier , Charles F. Carey , Eberhard B. Gramatzki , Thomas R. Homa , Eric A. Johnson , Pierre Langevin , Irving Memis , Son K. Tran , Robert F. White
发明人： William E. Bernier , Charles F. Carey , Eberhard B. Gramatzki , Thomas R. Homa , Eric A. Johnson , Pierre Langevin , Irving Memis , Son K. Tran , Robert F. White
IPC分类号： H01L23/48
CPC分类号： H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/13 , H01L2224/13099 , H01L2224/13111 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01058 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/351 , H05K3/3436 , H01L2924/00
摘要： A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
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公开(公告)号：US06677522B1
公开(公告)日：2004-01-13
申请号：US10255457
申请日：2002-09-26
IPC分类号： H01L2328
CPC分类号： H01L23/562 , H01L23/3121 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： An electronic component such as a ceramic capacitor is coupled to a dielectric substrate package. Encapsulant material substantially surrounding the sides of the component, develops cracks therein, particularly near the corners of the component where CTE stresses are greatest. The cracks propagate downward into the dielectric substrate material and sever circuit lines in the substrate causing failure. A mounting pad for the component is extended from beneath the component to substantially beyond the outer periphery of the encapsulant material to prevent cracks from propagating into the dielectric material.
摘要翻译： 诸如陶瓷电容器的电子部件耦合到电介质基板封装。 基本上围绕部件侧面的封装材料在其中产生裂纹，特别是在CTE应力最大的部件的拐角附近。 裂纹向下传播到电介质基片材料中，并使基片中的电路线导致故障。 用于部件的安装垫从部件下方延伸到基本上超过密封剂材料的外周边，以防止裂纹传播到电介质材料中。
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公开(公告)号：US06570259B2
公开(公告)日：2003-05-27
申请号：US09814789
申请日：2001-03-22
IPC分类号： H01L2348
CPC分类号： H01L21/563 , H01L23/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01004 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/10253 , H01L2924/13091 , H01L2924/00 , H01L2224/05639 , H01L2924/00014 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655
摘要： The present invention provides a package for a semiconductor chip that minimizes stresses and strains that arise from differential thermal expansion on chip-to-substrate or chip-to-card interconnections. A collar element of one or more elements is provided. Adhesive material connects the collar element to the electric device and to the substrate that supports it, forming a unitary electrical package.
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16.发明授权公开(公告)号：US06545869B2
公开(公告)日：2003-04-08
申请号：US09764048
申请日：2001-01-17
IPC分类号： H05K720
CPC分类号： H01L23/4334 , H01L21/4882 , H01L21/563 , H01L23/3735 , H01L24/32 , H01L2224/73203 , H01L2224/83951 , H01L2924/01006 , H01L2924/01033 , H01L2924/351 , Y10T29/4913 , H01L2924/3512 , H01L2924/00
摘要： An electronic structure, and associated method of fabrication, for coupling a heat spreader above a chip to a chip carrier below the chip. Initially provided is a substrate, a chip on a surface of the substrate and coupled to the substrate, and the heat spreader. Then a fillet of at least one adhesive material is formed on the chip and around a periphery of the chip. Additionally, the heat spreader is placed on a portion of the fillet and over a top surface of the chip. The fillet couples the heat spreader to the substrate. An outer surface of the fillet makes a to contact angle of about 25 degrees with the surface of the substrate. The small contact angle not exceeding about 25 degrees prevents cracking of the substrate that would otherwise result from thermal cycling.
摘要翻译： 一种用于将芯片上方的散热器与芯片下方的芯片载体耦合的电子结构及其制造方法。 最初提供的是衬底，衬底的表面上的芯片并且耦合到衬底和散热器。 然后在芯片上和芯片的周围形成至少一种粘合剂材料的圆角。 此外，散热器放置在圆角的一部分上并且在芯片的顶表面上。 圆角将散热器耦合到基板。 圆角的外表面与衬底的表面形成约25度的接触角。 小的接触角不超过约25度可以防止由于热循环而导致的基体的破裂。
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公开(公告)号：US06545126B1
公开(公告)日：2003-04-08
申请号：US09524841
申请日：2000-03-14
IPC分类号： C07K14195
CPC分类号： C07K14/33 , A61K47/6415 , C07K14/415 , C07K2319/00
摘要： A chimeric toxin is disclosed. In a preferred embodiment, the chimeric toxin comprises a botulinal neurotoxin heavy chain and non-clostridial toxin chain. A method of creating a chimeric toxin is also disclosed. The chimeric toxin will have utility for pharmacological treatment of neurological disorders.
摘要翻译： 公开了嵌合毒素。 在优选的实施方案中，嵌合毒素包含肉毒杆菌神经毒素重链和非梭菌毒素链。 还公开了产生嵌合毒素的方法。 嵌合毒素可用于神经系统疾病的药理学治疗。
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公开(公告)号：US06444209B1
公开(公告)日：2002-09-03
申请号：US09706047
申请日：2000-11-03
IPC分类号： A61K39385
CPC分类号： C07K14/33 , A61K39/00 , A61K47/6415 , Y10S435/842 , Y10S530/825
摘要： A hybrid botulinal neurotoxin is disclosed. In one embodiment, the neurotoxin comprises a combination of a botulinal neurotoxin heavy chain and light chain, wherein the light chain and heavy chain are not of the same serotype and wherein the heavy and light chains are linked by a homobifunctional sulfydryl linker. A method for creating hybrid neurotoxins comprised of different functional domains is also disclosed.
摘要翻译： 公开了一种混合肉毒杆菌神经毒素。 在一个实施方案中，神经毒素包括肉毒杆菌神经毒素重链和轻链的组合，其中轻链和重链不是相同的血清型，并且其中重链和轻链通过同双功能巯基接头连接。 还公开了由不同功能域组成的混合神经毒素的方法。
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19.发明授权Thermally enhanced and mechanically balanced flip chip package and method of forming 失效热增强和机械平衡倒装芯片封装和成型方法公开(公告)号：US06410988B1
公开(公告)日：2002-06-25
申请号：US09570895
申请日：2000-05-15
申请人： David V. Caletka , Jean Dery , Eric Duchesne , Michael A. Gaynes , Eric A. Johnson , Luis J. Matienzo , James R. Wilcox
发明人： David V. Caletka , Jean Dery , Eric Duchesne , Michael A. Gaynes , Eric A. Johnson , Luis J. Matienzo , James R. Wilcox
IPC分类号： H01L2348
CPC分类号： H01L23/4334 , H01L23/3128 , H01L24/29 , H01L24/32 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/10253 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/3512
摘要： A method of making a flip chip package that maintains flatness over a wide temperature range and provides good heat dissipation is described. A laminate substrate is electrically connected to electrical contacts disposed on a chip and underfill material is applied between the soldered connections. A body, for example an uncured dielectric material, is applied to the chip, the laminate substrate, a thermally conductive member or combinations thereof, and thermally conductive member is disposed adjacent to the surface of the chip that is opposite the surface connected to the laminate substrate. The body is extruded between the chip and the thermally conductive member. The thickness of the thermally conductive member is determined by balancing the stiffness and the CTE of both the thermally conductive member and the laminate substrate, and the length and width of the thermally conductive member may vary but are at least the size of the corresponding length and width of the chip.
摘要翻译： 描述了制造在宽温度范围内保持平坦度并提供良好散热的倒装芯片封装的方法。 层压基板电连接到设置在芯片上的电触头，底部填充材料被施加在焊接连接之间。 例如未固化介电材料的主体被施加到芯片，层压基板，导热构件或其组合，并且导热构件设置在与连接到层压板的表面相对的芯片的表面附近 基质。 主体在芯片和导热构件之间挤出。 导热构件的厚度通过平衡导热构件和层压衬底的刚度和CTE来确定，并且导热构件的长度和宽度可以变化，但是至少为相应长度的尺寸，并且 芯片的宽度。
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公开(公告)号：US6104093A
公开(公告)日：2000-08-15
申请号：US80117
申请日：1998-05-15
申请人： David V. Caletka , Jean Dery , Eric Duchesne , Michael A. Gaynes , Eric A. Johnson , Luis J. Matienzo , James R. Wilcox
发明人： David V. Caletka , Jean Dery , Eric Duchesne , Michael A. Gaynes , Eric A. Johnson , Luis J. Matienzo , James R. Wilcox
IPC分类号： H01L23/31 , H01L23/433 , H01L23/48
CPC分类号： H01L23/4334 , H01L23/3128 , H01L24/29 , H01L24/32 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/10253 , H01L2924/15311
摘要： A method of making a flip chip package that maintains flatness over a wide temperature range and provides good heat dissipation is described. A laminate substrate is electrically connected to electrical contacts disposed on a chip and underfill material is applied between the soldered connections. A body, for example an uncured dielectric material, is applied to the chip, the laminate substrate, a thermally conductive member or combinations thereof, and thermally conductive member is disposed adjacent to the surface of the chip that is opposite the surface connected to the laminate substrate. The body is extruded between the chip and the thermally conductive member. The thickness of the thermally conductive member is determined by balancing the stiffness and the CTE of both the thermally conductive member and the laminate substrate, and the length and width of the thermally conductive member may vary but are at least the size of the corresponding length and width of the chip.
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