公开(公告)号：US06235617B1

公开(公告)日：2001-05-22

申请号：US09588410

申请日：2000-06-06

申请人： Hiroji Kawai

发明人： Hiroji Kawai

IPC分类号： H01L218242

CPC分类号： H01L29/66212 ,  H01L21/2654 ,  H01L21/7605 ,  H01L21/8252 ,  H01L21/86 ,  H01L29/475 ,  H01L29/66863 ,  H01L29/812 ,  H01S5/20 ,  H01S5/2059 ,  H01S5/2231 ,  H01S5/32341

摘要： It is intended to provide a semiconductor device and its manufacturing method in which a high-resistance region maintaining a high resistance even under high temperatures can be made in a nitride III-V compound semiconductor layer having an electric conductivity by ion implantation. After a nitride III-V compound semiconductor layer having an electric conductivity is grown, a high resistance region is formed in the nitride III-V compound semiconductor layer by locally implanting boron ions therein. The amount of implanted boron is preferably not less than {fraction (1/30)}, or more preferably not less than {fraction (1/15)}, of the carrier concentration of the nitride III-V compound semiconductor layer. The high-resistance region is used as a device isolating region of an electron moving device or as a current blocking layer of a semiconductor laser.

摘要翻译： 旨在提供一种半导体器件及其制造方法，其中即使在高温下仍能保持高电阻的高电阻区域可以通过离子注入在具有导电性的氮化物III-V化合物半导体层中进行。 在生长具有导电性的氮化物III-V化合物半导体层之后，通过在其中局部注入硼离子，在氮化物III-V化合物半导体层中形成高电阻区域。 注入硼的量优选不小于氮化物III-V化合物半导体层的载流子浓度的{分数（1/30）}，更优选不小于{分数（1/15）}。 高电阻区域用作电子移动器件的器件隔离区域或半导体激光器的电流阻挡层。

公开(公告)号：US5753966A

公开(公告)日：1998-05-19

申请号：US772066

申请日：1996-12-19

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01S5/02 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01S5/0201 ,  H01S5/0202

摘要： A semiconductor light emitting device is prepared by the steps of forming a semiconductor layer 2 having a laminated structure containing at least a first cladding layer 6, a light emitting layer 7, and a second cladding layer 8 on a substrate 1 having {11-20} plane (plane a) as the main plane; and breaking integrally the semiconductor layer 2 and the substrate 1 under a heating condition to form a pair of facets on the above described substrate due to the plane which was cleaved in {1-102} plane (plane r) and at the same time, to form a pair of facets 3 extending along the above described pair of facets of the substrate 1 on the semiconductor layer 2.

摘要翻译： 通过以下步骤制备半导体发光器件：具有至少包含第一覆层6，发光层7和第二覆层8的层叠结构的半导体层2，具有{11-20 }面（平面a）为主面; 并且在加热条件下将半导体层2和基板1整体断开，由于在{1-102}面（平面r）中被切割的平面而在上述基板上形成一对面，同时， 以形成沿着半导体层2上的衬底1的上述一对面延伸的一对面3。

公开(公告)号：US20050087751A1

公开(公告)日：2005-04-28

申请号：US10990116

申请日：2004-11-16

申请人： Fumihiko Nakamura ,  Hisayoshi Kuramochi ,  Hiroji Kawai

发明人： Fumihiko Nakamura ,  Hisayoshi Kuramochi ,  Hiroji Kawai

IPC分类号： H01L29/73 ,  H01L21/00 ,  H01L21/20 ,  H01L21/205 ,  H01L21/318 ,  H01L21/331 ,  H01L21/335 ,  H01L21/338 ,  H01L21/762 ,  H01L27/095 ,  H01L29/20 ,  H01L29/207 ,  H01L29/22 ,  H01L29/778 ,  H01L29/812 ,  H01L31/02 ,  H01L31/0304 ,  H01L33/02 ,  H01L33/08 ,  H01L33/14 ,  H01L33/30 ,  H01L33/32 ,  H01S5/026 ,  H01L33/00

CPC分类号： H01L29/7787 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462 ,  H01L33/02 ,  H01L33/145 ,  H01L33/305

摘要： Disclosed herein is an insulating nitride layer suitable for group III-V nitride semiconductor devices. It has a high resistance and good insulating properties and hence it electrically isolates elements, without the active layer decreasing in conductivity. Disclosed also herein is a process for forming said nitride layer and a semiconductor device having said nitride layer for improved characteristic properties. The semiconductor device is an AlGaN/GaN HEMT or the like which has a GaN active layer and an insulating nitride layer formed thereon from a group III-V nitride compound semiconductor heavily doped mostly with a group IIB element (particularly Zn) in an amount not less than 1×1017/cm3.

摘要翻译： 本文公开了适用于III-V族氮化物半导体器件的绝缘氮化物层。 它具有高电阻和良好的绝缘性能，因此电气隔离元件，而电导率不会降低活性层。 此处还公开了用于形成所述氮化物层的方法和具有用于改善特性的所述氮化物层的半导体器件。 半导体器件是AlGaN / GaN HEMT等，其具有由主要以IIB族元素（特别是Zn）重量掺杂的III-V族氮化物化合物半导体形成的GaN有源层和绝缘氮化物层， 小于1×10 17 / cm 3。

公开(公告)号：US06426264B1

公开(公告)日：2002-07-30

申请号：US09482905

申请日：2000-01-14

申请人： Hiroji Kawai

发明人： Hiroji Kawai

IPC分类号： H01L21331

CPC分类号： H01L21/0237 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/0265 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/20 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/32341

摘要： A semiconductor crystal layer composed of GaN is grown on a base substrate composed of sapphire sandwiching a separating layer composed of AlN and a buffer layer composed of GaN. The separating layers and the buffer layers are distributed in the form of lines, and a flow-through hole for an etchant is formed in the side of these layers sandwiching an anti-growing film composed of SiO2. Thus, the etchant flows through the flow-through hole, the anti-growing film and the separating layer are etched, and the base substrate is easily isolated.

摘要翻译： 在由AlN构成的分离层和由GaN构成的缓冲层的蓝宝石构成的基板上生长由GaN构成的半导体晶体层。 分离层和缓冲层以管线的形式分布，并且在夹在由SiO 2组成的抗生长膜的这些层的侧面上形成用于蚀刻剂的流通孔。 因此，蚀刻剂流过流通孔，抗生长膜和分离层被蚀刻，并且基底衬底容易隔离。

公开(公告)号：US06281032B1

公开(公告)日：2001-08-28

申请号：US09291016

申请日：1999-04-14

申请人： Osamu Matsuda ,  Toshimasa Kobayashi ,  Norikazu Nakayama ,  Hiroji Kawai

发明人： Osamu Matsuda ,  Toshimasa Kobayashi ,  Norikazu Nakayama ,  Hiroji Kawai

IPC分类号： H01L2100

CPC分类号： H01S5/34333 ,  B82Y20/00 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/8252 ,  H01L33/0079 ,  H01L2221/68363 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01S5/0202 ,  H01S5/021 ,  H01S5/0213 ,  H01S5/0215 ,  H01S5/0217 ,  H01S5/02212 ,  H01S5/0264 ,  H01L2924/00014 ,  H01L2924/00

摘要： In a semiconductor device manufacturing method capable of manufacturing semiconductor lasers, light emitting diodes or electron transport devices using nitride III-V compound semiconductors with a high productivity, a GaN semiconductor laser wafer is prepared in which a plurality of semiconductor lasers are formed on an AlGaInN semiconductor layer on a c-face sapphire substrate and separated from each other by grooves deep enough to reach the c-face sapphire substrate, and a p-side electrode and an n-side electrode are formed in each semiconductor laser. The GaN semiconductor laser wafer is bonded to a photo-diode built-in Si wafer having formed a photo diode for monitoring light outputs and solder electrodes in each pellet by positioning the p-side electrode and the n-side electrode in alignment with the solder electrodes, respectively. After that, by lapping the c-face sapphire substrate from its bottom surface deep enough to reach the grooves or by dicing the c-face sapphire substrate from its bottom surface, the semiconductor lasers on the photo-diode built-in Si wafer are separated from each other. After that, the photo-diode built-in Si wafer is divided by dicing into discrete pellets. A GaN semiconductor laser chip, thus obtained, is assembled on a package.

摘要翻译： 在能够以高生产率制造半导体激光器，发光二极管或使用氮化物III-V化合物半导体的电子传输装置的半导体器件制造方法中，制备GaN半导体激光晶片，其中在AlGaInN上形成多个半导体激光器 半导体层，并且通过深度足以到达c面蓝宝石衬底的沟槽彼此分离，并且在每个半导体激光器中形成p侧电极和n侧电极。 将GaN半导体激光晶片通过将p侧电极和n侧电极定位在与焊料对准的状态下，与形成有二极管的光电二极管内置Si晶片接合，该光电二极管用于监测各个芯片中的光输出和焊料电极 电极。 之后，通过将C面蓝宝石衬底从其底部表面深度研磨到达凹槽或通过从其底部表面切割c面蓝宝石衬底，将二极管内置硅晶片上的半导体激光器分离 从彼此。 之后，光电二极管内置硅晶片通过切割分割成分散的颗粒。 由此获得的GaN半导体激光芯片组装在封装上。

公开(公告)号：US06239033B1

公开(公告)日：2001-05-29

申请号：US09316044

申请日：1999-05-21

申请人： Hiroji Kawai

发明人： Hiroji Kawai

IPC分类号： H01L21304

CPC分类号： H01L29/66522 ,  B82Y20/00 ,  H01L21/0332 ,  H01L21/304 ,  H01L21/30612 ,  H01L21/76898 ,  H01L29/812 ,  H01L33/0079 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/0217 ,  H01S5/0425 ,  H01S5/34333 ,  H01S2301/173 ,  H01S2304/04 ,  Y10S438/94

摘要： After making a GaN FET by growing GaN semiconductor layers on the surface of a sapphire substrate, the bottom surface of the sapphire substrate is processed by lapping, using an abrasive liquid containing a diamond granular abrasive material and reducing the grain size of the abrasive material in some steps, to reduce the thickness of the sapphire substrate to 100 &mgr;m or less. Thereafter, the bottom surface of the sapphire substrate is processed by etching using an etchant of phosphoric acid or phosphoric acid/sulfuric acid mixed liquid to remove a strained layer by lapping. Then, after making a via hole by etching the bottom surface of the sapphire substrate by using a similar etchant, the GaN semiconductor layer at the bottom of the via hole is removed by RIE to expose a Au pad electrically connected to the source of GaN FET. Thereafter, a thick Au film electrically connected to the Au pad is made through the via hole. The via hole may be made by irradiation of a pulse laser beam from a CO2 laser and subsequent etching.

摘要翻译： 在通过在蓝宝石衬底的表面上生长GaN半导体层制造GaN FET之后，通过使用含有金刚石颗粒磨料的研磨液研磨蓝宝石衬底的底表面，并将研磨材料的晶粒尺寸减小 一些步骤，将蓝宝石基板的厚度减小到100um以下。 此后，通过使用磷酸或磷酸/硫酸混合液的蚀刻剂进行蚀刻来处理蓝宝石衬底的底表面，以通过研磨去除应变层。 然后，通过使用类似的蚀刻剂蚀刻蓝宝石衬底的底表面来制造通孔之后，通过RIE去除通孔底部的GaN半导体层，以暴露电连接到GaN FET源极的Au焊盘 。 此后，通过通孔形成与Au焊盘电连接的厚Au膜。 通孔可以通过来自CO 2激光器的脉冲激光束的照射和随后的蚀刻来制成。

公开(公告)号：US5863811A

公开(公告)日：1999-01-26

申请号：US672042

申请日：1996-06-26

申请人： Hiroji Kawai ,  Tsunenori Asatsuma ,  Kenji Funato

发明人： Hiroji Kawai ,  Tsunenori Asatsuma ,  Kenji Funato

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L33/12 ,  H01L33/32 ,  H01S5/00 ,  H01S5/323

CPC分类号： H01L21/0242 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/0254 ,  Y10S148/025 ,  Y10S148/113

摘要： A method for growing a single crystal III-V compound semiconductor layer, in which grown by vapor deposition on a first single crystal III-V compound semiconductor layer including at least Ga and N is a second single crystal III-V compound semiconductor layer different from the first layer and including at least Ga and N, comprises the steps of: growing a buffer layer other than single crystal and having substantially the same composition as that of the second layer by vapor deposition on the first layer; and growing the second layer on the buffer layer. A method for growing a single crystal AlGaN layer on a single crystal GaN layer by vapor deposition, comprises the steps of: growing a buffer layer of a III-V compound semiconductor including at least Ga and N on the single crystal GaN layer by vapor deposition; and growing the single crystal AlGaN layer on the buffer layer by vapor deposition. A method for growing single crystal III-V compound semiconductor layers, in which a first single crystal III-V compound semiconductor layer including at least Ga and N and a second single crystal III-V compound semiconductor layer different from the first layer and including at least Ga and N are grown on a substrate by vapor deposition, comprises the step of: growing a buffer layer of a III-V compound semiconductor including at least Ga and N between the first layer and the second layer.

摘要翻译： 通过气相沉积在至少包括Ga和N的第一单晶III-V化合物半导体层上生长的单晶III-V化合物半导体层的方法是不同于第二单晶III-V化合物半导体层的第二单晶III-V化合物半导体层 第一层并且包括至少Ga和N，包括以下步骤：通过气相沉积在第一层上生长除单晶以外具有与第二层基本相同的组成的缓冲层; 并在缓冲层上生长第二层。 通过气相沉积在单晶GaN层上生长单晶AlGaN层的方法包括以下步骤：通过气相沉积在单晶GaN层上生长至少含有Ga和N的III-V族化合物半导体的缓冲层 ; 并通过气相沉积在缓冲层上生长单晶AlGaN层。 一种用于生长单晶III-V族化合物半导体层的方法，其中包含至少包含Ga和N的第一单晶III-V化合物半导体层和与第一层不同的第二单晶III-V化合物半导体层， 最少的Ga和N通过气相沉积在衬底上生长，包括以下步骤：在第一层和第二层之间生长包括至少Ga和N的III-V族化合物半导体的缓冲层。

公开(公告)号：US06362016B1

公开(公告)日：2002-03-26

申请号：US09557770

申请日：2000-04-25

申请人： Kenji Funato ,  Tsunenori Asatsuma ,  Hiroji Kawai

发明人： Kenji Funato ,  Tsunenori Asatsuma ,  Hiroji Kawai

IPC分类号： H01L2100

CPC分类号： H01L33/32

摘要： A luminous intensity of a semiconductor light emitting device having a multi-layer structure formed of nitride group III-V compound semiconductors is improved by having a thickness d of a light emitting layer (active layer) of the semiconductor light emitting device having a multi-layer structure of nitride group III-V compound semiconductors ranging from 0.3 nm to 1.5 nm.

摘要翻译： 具有由氮化物III-V族化合物半导体形成的多层结构的半导体发光器件的发光强度通过使半导体发光器件的发光层（有源层）的厚度d具有多层结构， 氮化物III-V族化合物半导体的层结构为0.3nm至1.5nm。

公开(公告)号：US6121636A

公开(公告)日：2000-09-19

申请号：US72177

申请日：1998-05-05

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/62 ,  H01S5/00 ,  H01S5/323 ,  H01L29/78 ,  H01L33/00

CPC分类号： H01L33/20 ,  H01L33/32 ,  H01L33/46 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48464 ,  H01L2224/49107 ,  H01L2224/73265

摘要： A semiconductor light emitting device is provided, which does not deteriorate in luminance, maintains a high reliability, permits more free choice of an adhesive, and promises effective extraction of light to the exterior even when it is bonded to a lead frame or other support with the adhesive in practical use. In a GaN light emitting diode, GaN compound semiconductor layers are stacked sequentially on a front surface of a sapphire substrate to form a light emitting diode structure, and a reflective film is formed on a rear surface. Alternatively, the GaN compound semiconductor layers forming the light emitting diode structure are selectively removed by etching to define an inverted mesa-shaped end surface, and the reflective film is formed on the end surface. Both the p-side electrode and the n-side electrode are formed on a common side of the substrate where the GaN compound semiconductor layers are formed.

摘要翻译： 提供一种半导体发光器件，其不会劣化亮度，保持高可靠性，允许更自由地选择粘合剂，并且即使当将其粘合到引线框架或其他支撑件上时也能有效地将光提取到外部， 粘合剂在实际使用中。 在GaN发光二极管中，GaN化合物半导体层依次层叠在蓝宝石衬底的前表面上以形成发光二极管结构，并且在后表面上形成反射膜。 或者，通过蚀刻选择性地除去形成发光二极管结构的GaN化合物半导体层，以限定倒置的台面状端面，并且在端面上形成反射膜。 p侧电极和n侧电极都形成在形成GaN化合物半导体层的基板的共同侧。

公开(公告)号：US6111273A

公开(公告)日：2000-08-29

申请号：US233909

申请日：1999-01-21

申请人： Hiroji Kawai

发明人： Hiroji Kawai

IPC分类号： H01L21/265 ,  H01L21/329 ,  H01L21/338 ,  H01L21/76 ,  H01L21/8252 ,  H01L21/86 ,  H01L29/47 ,  H01L29/812 ,  H01L33/06 ,  H01L33/14 ,  H01L33/32 ,  H01S5/00 ,  H01S5/20 ,  H01S5/223 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

CPC分类号： H01L29/66212 ,  H01L21/2654 ,  H01L21/7605 ,  H01L21/8252 ,  H01L21/86 ,  H01L29/475 ,  H01L29/66863 ,  H01L29/812 ,  H01S5/20 ,  H01S5/2059 ,  H01S5/2231 ,  H01S5/32341

摘要： It is intended to provide a semiconductor device and its manufacturing method in which a high-resistance region maintaining a high resistance even under high temperatures can be made in a nitride III-V compound semiconductor layer having an electric conductivity by ion implantation. After a nitride III-V compound semiconductor layer having an electric conductivity is grown, a high resistance region is formed in the nitride III-V compound semiconductor layer by locally implanting boron ions therein. The amount of implanted boron is preferably not less than 1/30, or more preferably not less than 1/15, of the carrier concentration of the nitride III-V compound semiconductor layer. The high-resistance region is used as a device isolating region of an electron moving device or as a current blocking layer of a semiconductor laser.

摘要翻译： 旨在提供一种半导体器件及其制造方法，其中即使在高温下仍能保持高电阻的高电阻区域可以通过离子注入在具有导电性的氮化物III-V化合物半导体层中进行。 在生长具有导电性的氮化物III-V化合物半导体层之后，通过在其中局部注入硼离子，在氮化物III-V化合物半导体层中形成高电阻区域。 注入硼的量优选不小于氮化物III-V化合物半导体层的载流子浓度的+ E，fra 1/30 + EE，或更优选不小于+ E，fra 1/15 + EE。 高电阻区域用作电子移动器件的器件隔离区域或半导体激光器的电流阻挡层。