公开(公告)号：US6121636A

公开(公告)日：2000-09-19

申请号：US72177

申请日：1998-05-05

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/62 ,  H01S5/00 ,  H01S5/323 ,  H01L29/78 ,  H01L33/00

CPC分类号： H01L33/20 ,  H01L33/32 ,  H01L33/46 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48464 ,  H01L2224/49107 ,  H01L2224/73265

摘要： A semiconductor light emitting device is provided, which does not deteriorate in luminance, maintains a high reliability, permits more free choice of an adhesive, and promises effective extraction of light to the exterior even when it is bonded to a lead frame or other support with the adhesive in practical use. In a GaN light emitting diode, GaN compound semiconductor layers are stacked sequentially on a front surface of a sapphire substrate to form a light emitting diode structure, and a reflective film is formed on a rear surface. Alternatively, the GaN compound semiconductor layers forming the light emitting diode structure are selectively removed by etching to define an inverted mesa-shaped end surface, and the reflective film is formed on the end surface. Both the p-side electrode and the n-side electrode are formed on a common side of the substrate where the GaN compound semiconductor layers are formed.

摘要翻译： 提供一种半导体发光器件，其不会劣化亮度，保持高可靠性，允许更自由地选择粘合剂，并且即使当将其粘合到引线框架或其他支撑件上时也能有效地将光提取到外部， 粘合剂在实际使用中。 在GaN发光二极管中，GaN化合物半导体层依次层叠在蓝宝石衬底的前表面上以形成发光二极管结构，并且在后表面上形成反射膜。 或者，通过蚀刻选择性地除去形成发光二极管结构的GaN化合物半导体层，以限定倒置的台面状端面，并且在端面上形成反射膜。 p侧电极和n侧电极都形成在形成GaN化合物半导体层的基板的共同侧。

公开(公告)号：US6107162A

公开(公告)日：2000-08-22

申请号：US59827

申请日：1998-04-14

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L21/20 ,  H01L33/14 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01S5/00 ,  H01S5/02 ,  H01S5/042 ,  H01S5/10 ,  H01S5/323 ,  H01L21/46

CPC分类号： H01S5/0201 ,  H01S5/0422 ,  H01S5/0202 ,  H01S5/0213 ,  H01S5/1082 ,  H01S5/32341

摘要： A semiconductor device such as a semiconductor layer is formed of a compound semiconductor layer of III-V group such as GaN. In the case where the substrate has not any planes that are easy to cleave which coincides with an easy-to-cleave plane of a semiconductor layer grown on the substrate or the substrate easily succumbs to cleavage, then the semiconductor layer together with the substrate can be broken into chips in an easy-to-cleave plane. The cleaved surface of the semiconductor layer can be positively formed as an optically superior surface. A compound semiconductor layer 2 containing at least one of the elements {Ga, Al, In} and N is formed on the substrate 1. This compound semiconductor layer 2 has a pair of facets of {11-20} plane substantially perpendicular to the substrate 1.

摘要翻译： 诸如半导体层的半导体器件由诸如GaN的III-V族的化合物半导体层形成。 在衬底没有任何容易切割的平面与衬底上生长的半导体层的容易解理平面或衬底容易陷入裂纹的情况相一致的情况下，半导体层与衬底一起可以 在易于分裂的飞机上被破碎成碎片。 可以将半导体层的分解面牢固地形成为光学优良的表面。 包含至少一种元素{Ga，Al，In}和N的化合物半导体层2形成在基板1上。该化合物半导体层2具有与基板垂直的{11-20}面的一对面 1。

公开(公告)号：US5753966A

公开(公告)日：1998-05-19

申请号：US772066

申请日：1996-12-19

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01S5/02 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01S5/0201 ,  H01S5/0202

摘要： A semiconductor light emitting device is prepared by the steps of forming a semiconductor layer 2 having a laminated structure containing at least a first cladding layer 6, a light emitting layer 7, and a second cladding layer 8 on a substrate 1 having {11-20} plane (plane a) as the main plane; and breaking integrally the semiconductor layer 2 and the substrate 1 under a heating condition to form a pair of facets on the above described substrate due to the plane which was cleaved in {1-102} plane (plane r) and at the same time, to form a pair of facets 3 extending along the above described pair of facets of the substrate 1 on the semiconductor layer 2.

摘要翻译： 通过以下步骤制备半导体发光器件：具有至少包含第一覆层6，发光层7和第二覆层8的层叠结构的半导体层2，具有{11-20 }面（平面a）为主面; 并且在加热条件下将半导体层2和基板1整体断开，由于在{1-102}面（平面r）中被切割的平面而在上述基板上形成一对面，同时， 以形成沿着半导体层2上的衬底1的上述一对面延伸的一对面3。

公开(公告)号：US06501154B2

公开(公告)日：2002-12-31

申请号：US09088743

申请日：1998-06-02

申请人： Etsuo Morita ,  Masao Ikeda ,  Hiroji Kawai

发明人： Etsuo Morita ,  Masao Ikeda ,  Hiroji Kawai

IPC分类号： H01L2904

CPC分类号： H01S5/3202 ,  H01L33/16 ,  H01L33/32 ,  H01S5/0202 ,  H01S5/32341 ,  H01S2304/04

摘要： There are provided a semiconductor substrate and a semiconductor laser using the semiconductor substrate which promises smooth and optically excellent cleaved surfaces and is suitable for fabricating semiconductor lasers using nitride III-V compound semiconductors. Using a semiconductor substrate, such as GaN substrate, having a major surface substantially normal to a {0001}-oriented face, e.g. {01-10}-oriented face or {11-20}-oriented face, or offset within ±5° from these faces, nitride III-V compound semiconductor layers are epitaxially grown on the substrate to form a laser structure. To make cavity edges, the GaN substrate is cleaved together with the overlying III-V compound semiconductor layers along high-cleavable {0001}-oriented faces.

摘要翻译： 提供了使用半导体衬底的半导体衬底和半导体激光器，该半导体衬底具有光滑和光学优异的切割表面，并且适用于使用氮化物III-V化合物半导体制造半导体激光器。 使用诸如GaN衬底的半导体衬底，其具有基本上垂直于{0001}取向面的主表面，例如， {01-10}取向的面或{11-20}取向的面，或偏离这些面的±5°以内，氮化物III-V化合物半导体层在衬底上外延生长以形成激光结构。 为了形成腔边缘，GaN衬底与沿着高可裂解{0001}取向面的上覆III-V化合物半导体层一起被切割。

公开(公告)号：US5821568A

公开(公告)日：1998-10-13

申请号：US769708

申请日：1996-12-18

申请人： Etsuo Morita ,  Hiroji Kawai

发明人： Etsuo Morita ,  Hiroji Kawai

IPC分类号： H01L21/20 ,  H01L33/14 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01S5/00 ,  H01S5/02 ,  H01S5/042 ,  H01S5/10 ,  H01S5/323 ,  H01L33/00

CPC分类号： H01S5/0201 ,  H01S5/0422 ,  H01S5/0202 ,  H01S5/0213 ,  H01S5/1082 ,  H01S5/32341

摘要： A semiconductor device such as a semiconductor layer is formed of a compound semiconductor layer of III-V group such as GaN. In the case where the substrate has not any planes that are easy to cleave which coincides with an easy-to-cleave plane of a semiconductor layer grown on the substrate or the substrate easily succumbs to cleavage, then the semiconductor layer together with the substrate can be broken into chips in an easy-to-cleave plane. The cleaved surface of the semiconductor layer can be positively formed as an optically superior surface. A compound semiconductor layer 2 containing at least one of the elements {Ga, Al, In} and N is formed on the substrate 1. This compound semiconductor layer 2 has a pair of facets of {11-20} plane substantially perpendicular to the substrate 1.

摘要翻译： 诸如半导体层的半导体器件由诸如GaN的III-V族的化合物半导体层形成。 在衬底没有任何容易切割的平面与衬底上生长的半导体层的容易解理平面或衬底容易陷入裂纹的情况相一致的情况下，半导体层与衬底一起可以 在易于分裂的飞机上被破碎成碎片。 可以将半导体层的分解面牢固地形成为光学优良的表面。 包含至少一种元素{Ga，Al，In}和N的化合物半导体层2形成在基板1上。该化合物半导体层2具有与基板垂直的{11-20}面的一对面 1。

公开(公告)号：US07364805B2

公开(公告)日：2008-04-29

申请号：US10466607

申请日：2002-01-18

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/00 ,  B63H1/26 ,  H01L21/31

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

摘要翻译： 使用具有位错的晶体基底来获得位错密度低的晶体膜，晶体基板和半导体器件。 生长衬底（11）的一侧设置有在其间具有缓冲层（12）的晶体层（13）。 晶体层（13）在从下方延伸的每个穿透位错D 1 1的末端具有间隔（13a），（13b）。 穿透位错D 1＆lt; 1＆gt;通过空间（13a），（13b）从上层分离，使得每个穿透位错D 1 1被阻止传播到 上层。 当由汉堡矢量表示的穿透位错D 1 1的位移被保留以产生另一位错时，空间（13a），（13b）改变其位移的方向。 结果，空间（13a），（13b）上方的上层以低位错密度变为结晶。

公开(公告)号：US20050196888A1

公开(公告)日：2005-09-08

申请号：US11113597

申请日：2005-04-25

申请人： Etsuo Morita

发明人： Etsuo Morita

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/335 ,  H01L33/00 ,  H01L33/12 ,  H01L33/16 ,  H01L33/20 ,  H01L33/32 ,  H01S5/00 ,  H01S5/02 ,  H01S5/323 ,  H01S5/343 ,  H01L21/00 ,  H01L21/46

CPC分类号： H01L33/20 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/66462 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/32341

摘要： To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

摘要翻译： 为了提高在蓝宝石衬底上生长的氮化物III-V化合物半导体层的晶体学特性，在蓝宝石衬底的主表面上形成多个凹槽，并且在其上生长氮化物III-V化合物半导体层。 每个凹部的内表面的至少一部分相对于蓝宝石衬底的主表面形成不小于10度的角度。 这些凹槽用比氮化物III-V化合物半导体层更高的Al组分比的氮化物III-V化合物半导体晶体掩埋，例如Al x Ga 1-x N Al组成比例x为0.2以上。 每个凹槽的深度不小于25nm，宽度不小于30nm。 凹槽可以在蓝宝石基板的热清洗或者通过使用光刻和蚀刻，热蚀刻等方面制成。

公开(公告)号：US06232623B1

公开(公告)日：2001-05-15

申请号：US09334666

申请日：1999-06-17

申请人： Etsuo Morita

发明人： Etsuo Morita

IPC分类号： H01L3300

CPC分类号： H01L33/20 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/66462 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/0213 ,  H01S5/32341

摘要： To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1−xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

摘要翻译： 为了提高在蓝宝石衬底上生长的氮化物III-V化合物半导体层的晶体学特性，在蓝宝石衬底的主表面上形成多个凹槽，并且在其上生长氮化物III-V化合物半导体层。 每个凹部的内表面的至少一部分相对于蓝宝石衬底的主表面形成不小于10度的角度。 通过例如Al组成比x为0.2以上的Al x Ga 1-x N晶体，比氮化物III-V化合物半导体层具有更高的Al组成比的氮化物III-V化合物半导体晶体埋设凹部。 每个凹槽的深度不小于25nm，宽度不小于30nm。 凹槽可以在蓝宝石基板的热清洗或者通过使用光刻和蚀刻，热蚀刻等方面制成。

公开(公告)号：US20080050599A1

公开(公告)日：2008-02-28

申请号：US11976246

申请日：2007-10-23

申请人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

发明人： Etsuo Morita ,  Yousuke Murakami ,  Goshi Biwa ,  Hiroyuki Okuyama ,  Masato Doi ,  Toyoharu Oohata

IPC分类号： B32B9/04

CPC分类号： H01L21/02538 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/0265

摘要： A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.

公开(公告)号：US5828086A

公开(公告)日：1998-10-27

申请号：US826108

申请日：1997-03-24

申请人： Akira Ishibashi ,  Satoshi Matsumoto ,  Masaharu Nagai ,  Satoshi Ito ,  Shigetaka Tomiya ,  Kazushi Nakano ,  Etsuo Morita

发明人： Akira Ishibashi ,  Satoshi Matsumoto ,  Masaharu Nagai ,  Satoshi Ito ,  Shigetaka Tomiya ,  Kazushi Nakano ,  Etsuo Morita

IPC分类号： H01L33/06 ,  H01L33/28 ,  H01S5/30 ,  H01S5/32 ,  H01S5/347 ,  H01L33/00

CPC分类号： H01L33/28 ,  B82Y20/00 ,  H01L33/06 ,  H01S5/347 ,  H01S2304/02 ,  H01S5/3059 ,  H01S5/3216

摘要： A semiconductor light emitting device ccomprises a first cladding layer, an active layer and a second cladding layer which are stacked on a semiconductor substrate. At least a part of the first cladding layer and the second cladding layer has a superlattice structure comprising II-VI compound semiconductor. Another semiconductor light emitting device comprises a first cladding layer, a first guide layer, an active layer, a second guide layer and a second cladding layer which are stacked on a semiconductor substrate. At least a part of the first cladding layer, the first guide layer, the second cladding layer and the second guide layer has a superlattice structure. Still anothr semiconductor light emitting device comprises a defect decomposing layer, a defect blocking layer, a first cladding layer, an active layer, a second cladding layer which are stacked on a semiconductor substrate. The defect decomposing layer and the defect blocking layer comprise a superlattice structure.

摘要翻译： 半导体发光器件包括堆叠在半导体衬底上的第一覆层，有源层和第二覆层。 第一包层和第二包层的至少一部分具有包含II-VI化合物半导体的超晶格结构。 另一种半导体发光器件包括堆叠在半导体衬底上的第一覆层，第一引导层，有源层，第二引导层和第二覆层。 第一包覆层，第一引导层，第二覆盖层和第二引导层的至少一部分具有超晶格结构。 还有一种半导体发光器件包括堆叠在半导体衬底上的缺陷分解层，缺陷阻挡层，第一覆层，有源层，第二覆层。 缺陷分解层和缺陷阻挡层包括超晶格结构。