公开(公告)号：US09308602B2

公开(公告)日：2016-04-12

申请号：US13333349

申请日：2011-12-21

申请人： Kazuhiro Hayashimoto ,  Yuta Fujinuma ,  Tsukasa Hagihara ,  Shuichi Usui ,  Yoshitaka Sanuki ,  Masahiro Takahashi

发明人： Kazuhiro Hayashimoto ,  Yuta Fujinuma ,  Tsukasa Hagihara ,  Shuichi Usui ,  Yoshitaka Sanuki ,  Masahiro Takahashi

IPC分类号： B23K26/28 ,  B23K26/32

CPC分类号： B23K26/28 ,  B23K26/082 ,  B23K26/244 ,  B23K26/32 ,  B23K26/322 ,  B23K2101/006 ,  B23K2101/18 ,  B23K2101/34 ,  B23K2103/04 ,  B23K2103/08 ,  B23K2103/50

摘要： A laser lap welding method by irradiating of a laser beam from one side of a plurality of overlapped workpieces (1, 2), the method includes the steps of: scanning (La) the laser beam in the forward direction along a predetermined section of the workpieces; reversing the scanning direction of the laser beam at a terminating end (t) of the predetermined section; scanning (Lb) the laser beam in the backward direction and terminating of the irradiating of the laser beam onto the predetermined section, wherein the scanning of the laser beam in the backward direction is offset from the scanning of the laser beam in the forward direction such that a part of weld bead (12) formed by the laser scanning in the backward direction overlaps the weld bead (11) formed by the laser scan in the forward direction.

摘要翻译： 一种通过从多个重叠工件（1,2）的一侧照射激光束的激光搭接焊接方法，所述方法包括以下步骤：沿着向前方向沿着预定部分扫描（La）激光束 工件 在所述预定部分的终止端（t）反转所述激光束的扫描方向; 沿着反方向扫描（Lb）激光束并终止将激光束照射到预定部分上，其中激光束沿向后方向的扫描偏离激光束在向前方向上的扫描，例如 通过沿向后方向的激光扫描形成的焊道（12）的一部分与沿着向前方向的激光扫描形成的焊道（11）重叠。

公开(公告)号：US09136388B2

公开(公告)日：2015-09-15

申请号：US13549867

申请日：2012-07-16

申请人： Shunpei Yamazaki ,  Masahiro Takahashi ,  Tatsuya Honda ,  Takehisa Hatano

发明人： Shunpei Yamazaki ,  Masahiro Takahashi ,  Tatsuya Honda ,  Takehisa Hatano

IPC分类号： H01L29/26 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/24 ,  H01L29/78618

摘要： Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

摘要翻译： 提供了能够实现所谓的常关断开关元件的晶体管的结构及其制造方法。 提供了通过提高晶体管的特性实现高速响应和高速操作的半导体器件的结构及其制造方法。 提供了一种高度可靠的半导体器件。 在其中半导体层，源极和漏极电极层，栅极绝缘层和栅极电极层以该顺序堆叠的晶体管中。 作为半导体层，含有铟，镓，锌和氧中的至少四种元素的氧化物半导体层，铟的组成比（原子百分比）为镓和a的组成比的两倍以上 使用锌的组成比。

公开(公告)号：US09123412B2

公开(公告)日：2015-09-01

申请号：US14018011

申请日：2013-09-04

申请人： Masahiro Takahashi ,  Dong Keun Kim ,  Hyuck Sang Yim

发明人： Masahiro Takahashi ,  Dong Keun Kim ,  Hyuck Sang Yim

IPC分类号： G11C11/00 ,  G11C13/00

CPC分类号： G11C13/003 ,  G11C11/1659 ,  G11C11/1673 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0054

摘要： According to one embodiment, a resistance change memory includes the following configuration. A first inverter includes first input and first output terminals and first and second voltage terminals. A second inverter includes second input and second output terminals and third and fourth voltage terminals. The second input terminal is connected to the first output terminal. The second output terminal is connected to the first input terminal. First and second transistors are connected to the first and second output terminals, respectively. Third and fourth transistors are connected to the first and third voltage terminals, respectively. A fifth transistor is connected between the first voltage terminal and the first memory cell. A sixth transistor is connected to the third voltage terminal. A controller turns on the first and second transistors, after turning off the fifth and sixth transistors.

摘要翻译： 根据一个实施例，电阻变化存储器包括以下配置。 第一反相器包括第一输入端和第一输出端以及第一和第二电压端。 第二反相器包括第二输入端和第二输出端以及第三和第四电压端。 第二输入端子连接到第一输出端子。 第二输出端子连接到第一输入端子。 第一和第二晶体管分别连接到第一和第二输出端子。 第三和第四晶体管分别连接到第一和第三电压端子。 第五晶体管连接在第一电压端和第一存储单元之间。 第六晶体管连接到第三电压端子。 在关闭第五和第六晶体管之后，控制器接通第一和第二晶体管。

公开(公告)号：US09070440B2

公开(公告)日：2015-06-30

申请号：US14201664

申请日：2014-03-07

申请人： Masahiro Takahashi

发明人： Masahiro Takahashi

IPC分类号： G11C7/22 ,  G11C7/06 ,  G11C7/08 ,  G11C5/06 ,  G11C7/00 ,  G11C29/00 ,  G11C7/14 ,  G11C13/00 ,  G11C5/14 ,  G11C29/02 ,  G11C16/28 ,  G11C11/56

CPC分类号： G11C13/0021 ,  G11C5/147 ,  G11C5/148 ,  G11C7/00 ,  G11C7/06 ,  G11C7/14 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  G11C11/1697 ,  G11C11/5678 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0038 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/28 ,  G11C29/021 ,  G11C2013/0054

摘要： According to one embodiment, a resistance change memory includes a first memory cell, a word line, a first bit line, first and second inverters, first to sixth MOS transistors, and a control circuit. The first transistor is connected to the first output terminal of the first inverter. The second transistor is connected to the second output terminal of the second inverter. The fifth transistor has a first current path whose one end is connected to the first voltage terminal of the first inverter. The sixth transistor has a second current path whose one end is connected to the third voltage terminal of the second inverter. The control circuit makes the first and second transistors a cutoff state by a first signal and makes the fifth and sixth transistors the cutoff state by a second signal in a standby state.

摘要翻译： 根据一个实施例，电阻变化存储器包括第一存储单元，字线，第一位线，第一和第二反相器，第一至第六MOS晶体管和控制电路。 第一晶体管连接到第一反相器的第一输出端。 第二晶体管连接到第二反相器的第二输出端。 第五晶体管具有第一电流路径，其一端连接到第一反相器的第一电压端子。 第六晶体管具有第二电流路径，其一端连接到第二反相器的第三电压端子。 控制电路通过第一信号使第一和第二晶体管成为截止状态，并且在待机状态下通过第二信号使第五和第六晶体管成为截止状态。

公开(公告)号：US08769237B2

公开(公告)日：2014-07-01

申请号：US12919318

申请日：2009-02-26

申请人： Mitsuhiro Nimura ,  Tatsumi Sakamoto ,  Toyoji Hiyokawa ,  Hiroyoshi Masuda ,  Tomofumi Shibata ,  Kazuyuki Hirakawa ,  Atsushi Yamazaki ,  Masahiro Hyakusawa ,  Masahiro Takahashi

发明人： Mitsuhiro Nimura ,  Tatsumi Sakamoto ,  Toyoji Hiyokawa ,  Hiroyoshi Masuda ,  Tomofumi Shibata ,  Kazuyuki Hirakawa ,  Atsushi Yamazaki ,  Masahiro Hyakusawa ,  Masahiro Takahashi

IPC分类号： G06F13/00

CPC分类号： G01C21/32

摘要： A map updating system includes: an update processing unit for performing update processing by reading data required in the update processing from a cache area of a memory when the data are stored in the cache area and from a map database when the data are not stored in the cache area; a cache storage unit for storing the data read by the update processing unit in the cache area; a processing memory capacity determination unit for determining a processing memory capacity, which is a capacity of the memory required as an update processing area, on the basis of the content of map data to be subjected to the update processing; and a cache capacity determination unit for determining a cache capacity, which is a capacity of the memory allocated to the cache area, on the basis of the processing memory capacity.

摘要翻译： 地图更新系统包括：更新处理单元，用于当数据存储在高速缓存区域中时，从存储器的高速缓存区域读取更新处理中所需的数据，并且当数据未被存储在地图数据库中时，执行更新处理 缓存区; 高速缓存存储单元，用于将由更新处理单元读取的数据存储在高速缓存区域中; 处理存储器容量确定单元，用于基于要进行更新处理的地图数据的内容来确定作为更新处理区域所需的存储器的容量的处理存储器容量; 以及高速缓存容量确定单元，用于基于处理存储器容量确定作为分配给高速缓存区域的存储器的容量的高速缓存容量。

公开(公告)号：US08705270B2

公开(公告)日：2014-04-22

申请号：US13415662

申请日：2012-03-08

申请人： Masahiro Takahashi ,  Yoshihiro Ueda

发明人： Masahiro Takahashi ,  Yoshihiro Ueda

IPC分类号： G11C11/00 ,  G11C11/16

CPC分类号： G11C11/16 ,  G11C11/1659 ,  G11C11/1675

摘要： A semiconductor memory has a first switch circuit and a second switch circuit. The semiconductor memory has a row decoder that controls a voltage of a word line. The semiconductor memory has a first writing circuit including a first signal terminal connected to one end of the first switch circuit to input and output a writing current. The semiconductor memory has a second writing circuit including a second signal terminal connected to a one end of the second switch circuit to input and output the writing current. The semiconductor memory has a select transistor including a control terminal connected to the word line. The semiconductor memory has a resistance change element that is connected in series with the select transistor between the first bit line and the second bit line and varies in resistance value depending on an applied current.

摘要翻译： 半导体存储器具有第一开关电路和第二开关电路。 半导体存储器具有控制字线电压的行解码器。 半导体存储器具有第一写入电路，该第一写入电路包括连接到第一开关电路的一端的第一信号端子，以输入和输出写入电流。 半导体存储器具有第二写入电路，该第二写入电路包括连接到第二开关电路的一端的第二信号端子，以输入和输出写入电流。 半导体存储器具有包括连接到字线的控制端的选择晶体管。 半导体存储器具有与第一位线和第二位线之间的选择晶体管串联连接的电阻变化元件，并根据所施加的电流而变化电阻值。

公开(公告)号：US20130195730A1

公开(公告)日：2013-08-01

申请号：US13824762

申请日：2011-10-26

申请人： Nobutaka Ohya ,  Noriya Tokunaga ,  Tetsuo Hayase ,  Masahiro Takahashi

发明人： Nobutaka Ohya ,  Noriya Tokunaga ,  Tetsuo Hayase ,  Masahiro Takahashi

IPC分类号： B01J10/00

CPC分类号： B01J10/00 ,  B01J19/006 ,  B01J19/2405 ,  B01J19/2415 ,  B01J2219/00094 ,  B01J2219/00247 ,  B01J2219/00772 ,  B01J2219/00779 ,  C10L3/108 ,  F28G1/06 ,  F28G3/08 ,  F28G7/00

摘要： To enable long-term continuous operation by preventing blocking of a reaction pipe line disposed in a multi-pipe or double-walled-pipe heat exchanger, provided is a device for producing gas hydrate including a multi-pipe or double-walled-pipe device 1 for generating gas hydrate having a reaction pipe line 2 for flowing raw material water w and raw material gas g and a coolant circulation region 3 for circulating a coolant c and thereby cooling the reaction pipe line 2, wherein a coil spring 4 extending in the longitudinal direction of the reaction pipe line 2 is provided in the reaction pipe line 2.

摘要翻译： 为了能够通过防止多管或双壁管式热交换器中的反应管路的堵塞来实现长期的连续运转，提供了一种生产包括多管或双壁管装置的气体水合物的装置 1，用于产生具有用于使原料水w和原料气体g流动的反应管线2的气体水合物和用于使冷却剂c循环的冷却剂循环区域3，从而冷却反应管线2，其中螺旋弹簧4在 反应管线2的长度方向设置在反应管线2中。

公开(公告)号：US08498144B2

公开(公告)日：2013-07-30

申请号：US13191678

申请日：2011-07-27

申请人： Masahiro Takahashi ,  Katsuyuki Fujita ,  Yoshihiro Ueda ,  Katsuhiko Hoya

发明人： Masahiro Takahashi ,  Katsuyuki Fujita ,  Yoshihiro Ueda ,  Katsuhiko Hoya

IPC分类号： G11C11/00 ,  G11C11/15

CPC分类号： G11C8/10 ,  G11C8/08 ,  G11C11/1675 ,  G11C11/1693

摘要： A semiconductor storage device includes first to fourth switch circuit. The semiconductor storage device includes a row decoder which controls a voltage of a word line. The semiconductor storage device includes a first selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a first resistance change element which is connected in series to the first selection transistor between the first bit line and the second bit line, and of which a resistance value changes according to a flowing current. The semiconductor storage device includes a second selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a second resistance change element which is connected in series to the second selection transistor between the second bit line and the third bit line, and of which a resistance value changes according to a flowing current.

摘要翻译： 半导体存储装置包括第一至第四开关电路。 半导体存储装置包括用于控制字线电压的行译码器。 半导体存储装置包括控制端子连接到字线的第一选择晶体管。 半导体存储装置包括与第一位线和第二位线之间的第一选择晶体管串联连接的第一电阻变化元件，其电阻值根据流动电流而变化。 半导体存储装置包括控制端子连接到字线的第二选择晶体管。 半导体存储装置包括与第二位线和第三位线之间的第二选择晶体管串联连接的第二电阻变化元件，其电阻值根据流动电流而变化。

公开(公告)号：US20120228285A1

公开(公告)日：2012-09-13

申请号：US13411913

申请日：2012-03-05

申请人： Masahiro Takahashi

发明人： Masahiro Takahashi

IPC分类号： H05B6/10

CPC分类号： H05B6/145

摘要： A temperature detection unit is arranged in a position between a magnetic field generation coil and a magnetic core that lies inside a heat generation member. A cut portion for exposing the temperature detection unit through the magnetic core has a thickness when seen in a cross section in the direction of a magnetic flux.

摘要翻译： 温度检测单元设置在位于发热构件内部的磁场产生线圈和磁芯之间的位置。 用于通过磁芯暴露温度检测单元的切割部分在沿磁通方向的横截面中看到时具有厚度。

公开(公告)号：US20120097651A1

公开(公告)日：2012-04-26

申请号：US13279905

申请日：2011-10-24

申请人： Masahiro Takahashi ,  Tsukasa Hagihara

发明人： Masahiro Takahashi ,  Tsukasa Hagihara

IPC分类号： B23K26/00

CPC分类号： B23K26/244 ,  B23K33/00 ,  B23K2101/18 ,  B23K2101/34 ,  B23K2103/04 ,  B23K2103/08

摘要： A laser lap welding method for parts made of galvanized steel sheet includes steps of: press-forming two parts from galvanized steel sheet such that the two parts include elongated joining regions to be welded together on mutually opposed surfaces thereof and a plurality of protrusions are formed on at least any one of the joining regions of the two parts at predetermined intervals in a longitudinal direction of the joining region; retaining the two parts in a state in which the joining regions are overlapped one on the other such that a gap according to a height of the protrusions is formed between the joining regions; and irradiating a laser onto one surface of the overlapped joining regions of the two parts such that the overlapped joining regions are fused and welded by energy of the laser, and zinc gas produced with fusing is discharged through the gap.

摘要翻译： 用于镀锌钢板的部件的激光搭接焊接方法包括以下步骤：从镀锌钢板上压制两部分，使得两部分包括在其相互相对的表面上被焊接在一起的细长接合区域，并且形成多个突起 在所述接合区域的纵向方向上以预定间隔在所述两个部分中的至少任一个接合区域中; 将两部分保持在接合区域彼此重叠的状态，使得在接合区域之间形成根据突起的高度的间隙; 并且将激光照射到两个部分的重叠接合区域的一个表面上，使得重叠的接合区域被激光的能量熔合和焊接，并且通过该熔融物产生的锌气体通过间隙排出。