公开(公告)号：US20180138028A1

公开(公告)日：2018-05-17

申请号：US15847744

申请日：2017-12-19

Applicant: Lam Research Corporation

Inventor： Jon Henri ,  Dennis M. Hausmann ,  Bart J. van Schravendijk ,  Shane Tang ,  Karl F. Leeser

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/52 ,  C23C16/50

CPC classification number: H01L21/0228 ,  C23C16/04 ,  C23C16/045 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/45544 ,  C23C16/50 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02312 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/0262

Abstract: Methods of selectively inhibiting deposition of silicon-containing films deposited by atomic layer deposition are provided. Selective inhibition involves exposure of an adsorbed layer of a silicon-containing precursor to a hydrogen-containing inhibitor, and in some instances, prior to exposure of the adsorbed layer to a second reactant. Exposure to a hydrogen-containing inhibitor may be performed with a plasma, and methods are suitable for selective inhibition in thermal or plasma enhanced atomic layer deposition of silicon-containing films.

公开(公告)号：US20180102245A1

公开(公告)日：2018-04-12

申请号：US15817579

申请日：2017-11-20

Applicant: LAM RESEARCH CORPORATION

Inventor： James S. Sims ,  Jon Henri ,  Ramesh Chandrasekharan ,  Andrew John McKerrow ,  Seshasayee Varadarajan ,  Kathryn Merced Kelchner

IPC: H01L21/02 ,  H01J37/32 ,  C23C16/02 ,  C23C16/50 ,  C23C16/455 ,  C23C16/34

CPC classification number: H01L21/0228 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/4554 ,  C23C16/50 ,  H01J37/32082 ,  H01J37/32467 ,  H01J37/32513 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32715 ,  H01J37/32862 ,  H01J2237/3321 ,  H01J2237/335 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274

Abstract: A method of depositing ALD films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma such that aluminum-rich byproducts are formed on the ceramic surfaces, (b) depositing a conformal halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces so as to cover the aluminum-rich byproducts, (c) depositing a pre-coating on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film on the semiconductor substrate supported on the ceramic surface of the pedestal.

公开(公告)号：US09824884B1

公开(公告)日：2017-11-21

申请号：US15287176

申请日：2016-10-06

Applicant: LAM RESEARCH CORPORATION

Inventor： James S. Sims ,  Jon Henri ,  Ramesh Chandrasekharan ,  Andrew John McKerrow ,  Seshasayee Varadarajan ,  Kathryn Merced Kelchner

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/50 ,  C23C16/455 ,  H01J37/32

CPC classification number: H01L21/0228 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/4554 ,  C23C16/50 ,  H01J37/32082 ,  H01J37/32467 ,  H01J37/32513 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32715 ,  H01J37/32862 ,  H01J2237/3321 ,  H01J2237/335 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274

Abstract: A method of depositing silicon nitride films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma, (b) depositing a halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces, (c) depositing a precoating of ALD silicon nitride on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film of ALD silicon nitride on the semiconductor substrate supported on the ceramic surface of the pedestal.

公开(公告)号：US09564312B2

公开(公告)日：2017-02-07

申请号：US14552011

申请日：2014-11-24

Applicant: Lam Research Corporation

Inventor： Jon Henri ,  Dennis M. Hausmann ,  Bart J. van Schravendijk ,  Shane Tang ,  Karl F. Leeser

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/52 ,  C23C16/50

CPC classification number: H01L21/0228 ,  C23C16/04 ,  C23C16/045 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/45544 ,  C23C16/50 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02312 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/0262

Abstract: Methods of selectively inhibiting deposition of silicon-containing films deposited by atomic layer deposition are provided. Selective inhibition involves exposure of an adsorbed layer of a silicon-containing precursor to a hydrogen-containing inhibitor, and in some instances, prior to exposure of the adsorbed layer to a second reactant. Exposure to a hydrogen-containing inhibitor may be performed with a plasma, and methods are suitable for selective inhibition in thermal or plasma enhanced atomic layer deposition of silicon-containing films.

Abstract translation: 提供了选择性地抑制通过原子层沉积沉积的含硅膜沉积的方法。 选择性抑制包括将含硅前体的吸附层暴露于含氢抑制剂，并且在一些情况下，在将吸附层暴露于第二反应物之前。 可以用等离子体进行暴露于含氢抑制剂，并且方法适合于选择性抑制含硅薄膜的热或等离子体增强的原子层沉积。

公开(公告)号：US20140113457A1

公开(公告)日：2014-04-24

申请号：US14144107

申请日：2013-12-30

Applicant: Lam Research Corporation

Inventor： James S. Sims ,  Jon Henri ,  Kathryn M. Kelchner ,  Sathish Babu S. V. Janjam ,  Shane Tang

IPC: H01L21/02 ,  C23C16/515

CPC classification number: H01L21/0217 ,  C23C16/045 ,  C23C16/345 ,  C23C16/402 ,  C23C16/45523 ,  C23C16/4554 ,  C23C16/515 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02175 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/67017 ,  H01L21/6719 ,  H01L21/67201 ,  H01L21/76224 ,  H01L21/76829

Abstract: The embodiments herein focus on plasma enhanced atomic layer deposition (PEALD) processes using pulsed plasmas. While conventional PEALD processes use continuous wave plasmas during the plasma exposure/conversion operation, the embodiments herein utilize a pulsed plasma during this operation to achieve a film with high quality sidewalls. Because conventional PEALD techniques result in films having high quality at the bottom and top of a feature, but low quality on the sidewalls, this increased sidewall quality in the disclosed methods corresponds to a film that is overall more uniform in quality compared to that achieved with conventional continuous wave plasma techniques.

Abstract translation: 本文的实施例集中于使用脉冲等离子体的等离子体增强原子层沉积（PEALD）工艺。 虽然常规PEALD工艺在等离子体曝光/转换操作期间使用连续波等离子体，但是本文的实施例在此操作期间利用脉冲等离子体来实现具有高质量侧壁的膜。 因为常规的PEALD技术导致在特征的底部和顶部具有高质量但在侧壁上质量较差的膜，因此在所公开的方法中增加的侧壁质量对应于整体上在质量上更均匀的膜， 常规连续波等离子体技术。

公开(公告)号：US12266535B2

公开(公告)日：2025-04-01

申请号：US17642918

申请日：2020-09-23

Applicant: Lam Research Corporation

Inventor： Kapu Sirish Reddy ,  Jon Henri ,  Francis Sloan Roberts

IPC: H01L21/02 ,  C23C16/26 ,  H01L21/033 ,  H01L21/308 ,  H01L23/29

Abstract: A tool and method for processing substrates by encapsulating a mask to protect from degradation during an etch-back to prevent a feature liner material from pinching off an opening during deposition-etch cycles used to fabricate high aspect ratio features with very tight critical dimension control.

公开(公告)号：US20250069882A1

公开(公告)日：2025-02-27

申请号：US18727030

申请日：2022-12-30

Applicant: Lam Research Corporation

Inventor： Awnish Gupta ,  Bart J. Van Schravendijk ,  Jon Henri ,  Oksana Savchak ,  Fengyan Wei ,  Easwar Srinivasan

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/455

Abstract: Methods and apparatuses for depositing silicon nitride in various applications are provided. Embodiments include depositing silicon nitride directly on silicon or silicon oxide surfaces using modulated dose to conversion time ratios in thermal atomic layer deposition. Embodiments include exposing a silicon oxide surface to a nitrogen-containing plasma treatment prior to depositing any silicon nitride and depositing silicon nitride by thermal atomic layer deposition.

公开(公告)号：US20200006073A1

公开(公告)日：2020-01-02

申请号：US16022503

申请日：2018-06-28

Applicant: Lam Research Corporation

Inventor： David Charles Smith ,  Jon Henri ,  Dennis M. Hausmann ,  Paul C. Lemaire

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/3105 ,  H01J37/32 ,  C23C16/04 ,  C23C16/24 ,  C23C16/32 ,  C23C16/36 ,  C23C16/52

Abstract: Methods and apparatuses for selectively growing metal-containing hard masks are provided herein. Methods include providing a substrate having a pattern of spaced apart features, each feature having a top horizontal surface, filling spaces between the spaced apart features with carbon-containing material to form a planar surface having the top horizontal surfaces of the features and carbon-containing material, selectively depositing a metal-containing hard mask on the top horizontal surfaces of the features relative to the carbon-containing material, and selectively removing the carbon-containing material relative to the metal-containing hard mask and features.

公开(公告)号：US20190341256A1

公开(公告)日：2019-11-07

申请号：US15972918

申请日：2018-05-07

Applicant: Lam Research Corporation

Inventor： Nagraj Shankar ,  Kapu Sirish Reddy ,  Jon Henri ,  Pengyi Zhang ,  Elham Mohimi ,  Bhavin Jariwala ,  Arpan Pravin Mahorowala

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  H01L21/02

Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.

公开(公告)号：US10347547B2

公开(公告)日：2019-07-09

申请号：US15232708

申请日：2016-08-09

Applicant: Lam Research Corporation

Inventor： Seshasayee Varadarajan ,  Aaron R. Fellis ,  Andrew John McKerrow ,  James Samuel Sims ,  Ramesh Chandrasekharan ,  Jon Henri

IPC: H01L21/66 ,  H01L21/02 ,  C23C16/455 ,  C23C16/50 ,  C23C16/52 ,  C23C16/458 ,  C23C16/46 ,  C23C16/505 ,  C23C16/54 ,  H01L21/67 ,  H01L21/677

Abstract: Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).