CIRCUIT WITH TRANSISTORS HAVING COUPLED GATES

    公开(公告)号:US20180026630A1

    公开(公告)日:2018-01-25

    申请号:US15215310

    申请日:2016-07-20

    CPC classification number: H03K17/165 H03K2217/0036 H03K2217/0054

    Abstract: A circuit can include a first transistor including a source and a gate; a second transistor including a drain and a gate, wherein the source of the first transistor is coupled to the drain of the second transistor; and a switchable element. In one embodiment, a first current-carrying terminal of the switchable element is coupled to the gate of the first transistor, and a second current-carrying terminal of the switchable element is coupled to the gate of the second transistor. In another embodiment, the switchable element is coupled to the gate of the first transistor and includes a first selectable terminal of the switchable element coupled to a source of the second transistor, and a second selectable terminal of the switchable element coupled to the gate of the second transistor. In a particular embodiment, the circuit can be a cascode circuit

    FORMING SHIELD CONTACTS IN A SHIELDED-GATE TRENCH POWER MOSFET

    公开(公告)号:US20220310813A1

    公开(公告)日:2022-09-29

    申请号:US17653235

    申请日:2022-03-02

    Abstract: A device includes a mesa disposed between a pair of vertical trenches in a semiconductor substrate. A gate electrode is disposed in each of the pair of vertical trenches, and a shield electrode is disposed below each of the gate electrodes in the pair of vertical trenches. The device further includes a bridge connection trench traversing the mesa. The bridge connection trench is in fluid communication with each of the pair of vertical trenches. A bridge shield electrode is disposed in the bridge connection trench and is coupled to the shield electrode disposed below each of the gate electrodes in the pair of vertical trenches.

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