公开(公告)号：US20150357318A1

公开(公告)日：2015-12-10

申请号：US14297899

申请日：2014-06-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chin-Liang Chen ,  Yu-Chih Liu ,  Kuan-Lin Ho ,  Wei-Ting Lin ,  Shih-Yen Lin

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16058 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/15313 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81

摘要： Chip packages and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a chip package includes: stacking a second chip on a first chip, wherein a first interconnect including a support structure and a bonding structure is disposed between the first chip and the second chip; bonding the first chip and the second chip via a thermal process applied to the bonding structure of the first interconnect; stacking a third chip on the second chip, wherein a second interconnect including a support structure and a bonding structure is disposed between the second chip and the third chip; bonding the second chip and the third chip via the thermal process applied to the bonding structure of the second interconnect; and reflowing the bond between the first and second chips and simultaneously reflowing the bond between the second and third chips.

摘要翻译： 公开了芯片封装及其制造方法。 在一些实施例中，制造芯片封装的方法包括：在第一芯片上堆叠第二芯片，其中包括支撑结构和接合结构的第一互连设置在第一芯片和第二芯片之间; 通过施加到第一互连的接合结构的热处理来接合第一芯片和第二芯片; 在第二芯片上堆叠第三芯片，其中包括支撑结构和接合结构的第二互连设置在第二芯片和第三芯片之间; 通过施加到第二互连的接合结构的热处理来接合第二芯片和第三芯片; 并且回流第一和第二芯片之间的结合，同时回流第二和第三芯片之间的结合。

公开(公告)号：US20190139817A1

公开(公告)日：2019-05-09

申请号：US16222435

申请日：2018-12-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Lin Ho ,  Chin-Liang Chen ,  Wei-Ting Lin ,  Yu-Chih Liu ,  Shih-Yen Lin

IPC分类号： H01L21/762 ,  H01L25/065 ,  H01L23/00 ,  H01L23/16 ,  H01L21/683 ,  H01L23/367 ,  H01L21/56

摘要： A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

公开(公告)号：US10163754B2

公开(公告)日：2018-12-25

申请号：US14140692

申请日：2013-12-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Lin Ho ,  Sheng-Hsiang Chiu ,  Hsin-Yu Pan ,  Yu-Chih Liu ,  Chin-Liang Chen

IPC分类号： H01L23/34 ,  H01L23/055 ,  H01L23/367 ,  H01L23/433 ,  H01L23/04 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L23/373

摘要： Embodiments of a lid covering a device die improving heat dissipation for a die package are described. Trenches are formed on the bottom side of a lid to increase surface area for heat dissipation. Various embodiments of the trenches on the lid are described. The layout and design of the trenches could be optimized to meet the heat dissipation need of the device die(s). By using the lid with trenches, heat dissipation efficiency is improved and the amount of thermal interface material (TIM) could be reduced. In addition, the selection of thermal interface materials for the lid is widened.

公开(公告)号：US20180061783A1

公开(公告)日：2018-03-01

申请号：US15804311

申请日：2017-11-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Lin Ho ,  Chin-Liang Chen ,  Chi-Yang Yu ,  Yu-Chih Liu

IPC分类号： H01L23/58 ,  H01L25/065 ,  H01L21/48 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/585 ,  H01L21/4853 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/17 ,  H01L24/27 ,  H01L24/32 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/15311 ,  H01L2924/15313

摘要： A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a die structure formed over the substrate. The semiconductor device structure also includes a lid structure formed over the die structure. The lid structure includes a top portion with a top length and a bottom portion with a bottom length, and the top length is greater than the bottom length. The semiconductor device structure also includes a package layer formed between the lid structure and the die structure, and a sidewall of the bottom portion of the lid structure is not aligned with a sidewall of the die structure.

公开(公告)号：US09859265B2

公开(公告)日：2018-01-02

申请号：US14298548

申请日：2014-06-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chih Liu ,  Kuan-Lin Ho ,  Wei-Ting Lin ,  Chin-Liang Chen ,  Jing Ruei Lu

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/14 ,  H01L23/15 ,  H01L23/367

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/565 ,  H01L23/145 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0652 ,  H01L2224/08225 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/80 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/01029 ,  H01L2924/141 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/01047

摘要： Embodiments relate to packages and methods of forming packages. A package includes a package substrate, a first device die, first electrical connectors, an encapsulant, a redistribution structure, and a second device die. The first device die is attached to a side of the package substrate, and the first electrical connectors are mechanically and electrically coupled to the side of the package substrate. The encapsulant at least laterally encapsulates the first electrical connectors and the first device die. The redistribution structure is on the encapsulant and the first electrical connectors. The redistribution structure is directly coupled to the first electrical connectors. The first device die is disposed between the redistribution structure and the package substrate. The second device die is attached to the redistribution structure by second electrical connectors, and the second electrical connectors are directly coupled to the redistribution structure.

公开(公告)号：US09673119B2

公开(公告)日：2017-06-06

申请号：US14163000

申请日：2014-01-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Yen Lin ,  Yu-Chih Liu ,  Chin-Liang Chen ,  Wei-Ting Lin ,  Kuan-Lin Ho

IPC分类号： H01L23/34 ,  H01L23/10 ,  H01L23/04 ,  H01L23/31 ,  H01L21/56 ,  H01L23/58 ,  H01L23/367 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L23/498

CPC分类号： H01L23/10 ,  H01L21/563 ,  H01L23/04 ,  H01L23/3142 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2224/11002 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/1615 ,  H01L2924/16152 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1631 ,  H01L2924/1632 ,  H01L2924/164 ,  H01L2924/014

摘要： Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.

公开(公告)号：US20150187679A1

公开(公告)日：2015-07-02

申请号：US14140692

申请日：2013-12-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Lin Ho ,  Sheng-Hsiang Chiu ,  Hsin-Yu Pan ,  Yu-Chih Liu ,  Chin-Liang Chen

IPC分类号： H01L23/433 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/433 ,  H01L21/4803 ,  H01L21/563 ,  H01L23/04 ,  H01L23/055 ,  H01L23/34 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/3737 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83385 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

摘要： Embodiments of a lid covering a device die improving heat dissipation for a die package are described. Trenches are formed on the bottom side of a lid to increase surface area for heat dissipation. Various embodiments of the trenches on the lid are described. The layout and design of the trenches could be optimized to meet the heat dissipation need of the device die(s). By using the lid with trenches, heat dissipation efficiency is improved and the amount of thermal interface material (TIM) could be reduced. In addition, the selection of thermal interface materials for the lid is widened.

摘要翻译： 描述了覆盖器件管芯的盖的实施例，其改善了管芯封装的散热。 在盖的底侧上形成沟槽以增加用于散热的表面积。 描述盖上的沟槽的各种实施例。 可以优化沟槽的布局和设计，以满足器件裸片的散热需要。 通过使用具有沟槽的盖，散热效率提高，并且可以减少热界面材料（TIM）的量。 此外，盖的热界面材料的选择也变宽了。

公开(公告)号：US11417643B2

公开(公告)日：2022-08-16

申请号：US16674720

申请日：2019-11-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chih Liu ,  Kuan-Lin Ho ,  Wei-Ting Lin ,  Chin-Liang Chen ,  Jing Ruei Lu

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56 ,  H01L23/14 ,  H01L23/15 ,  H01L23/367 ,  H01L23/31

摘要： Embodiments relate to packages and methods of forming packages. A package includes a package substrate, a first device die, first electrical connectors, an encapsulant, a redistribution structure, and a second device die. The first device die is attached to a side of the package substrate, and the first electrical connectors are mechanically and electrically coupled to the side of the package substrate. The encapsulant at least laterally encapsulates the first electrical connectors and the first device die. The redistribution structure is on the encapsulant and the first electrical connectors. The redistribution structure is directly coupled to the first electrical connectors. The first device die is disposed between the redistribution structure and the package substrate. The second device die is attached to the redistribution structure by second electrical connectors, and the second electrical connectors are directly coupled to the redistribution structure.

公开(公告)号：US20200066704A1

公开(公告)日：2020-02-27

申请号：US16674720

申请日：2019-11-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chih Liu ,  Kuan-Lin Ho ,  Wei-Ting Lin ,  Chin-Liang Chen ,  Jing Ruei Lu

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56

摘要： Embodiments relate to packages and methods of forming packages. A package includes a package substrate, a first device die, first electrical connectors, an encapsulant, a redistribution structure, and a second device die. The first device die is attached to a side of the package substrate, and the first electrical connectors are mechanically and electrically coupled to the side of the package substrate. The encapsulant at least laterally encapsulates the first electrical connectors and the first device die. The redistribution structure is on the encapsulant and the first electrical connectors. The redistribution structure is directly coupled to the first electrical connectors. The first device die is disposed between the redistribution structure and the package substrate. The second device die is attached to the redistribution structure by second electrical connectors, and the second electrical connectors are directly coupled to the redistribution structure.

公开(公告)号：US10157863B2

公开(公告)日：2018-12-18

申请号：US15804311

申请日：2017-11-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Lin Ho ,  Chin-Liang Chen ,  Chi-Yang Yu ,  Yu-Chih Liu

IPC分类号： H01L23/12 ,  H01L21/00 ,  H05K7/20 ,  H01L23/58 ,  H01L21/48 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

摘要： A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a die structure formed over the substrate. The semiconductor device structure also includes a lid structure formed over the die structure. The lid structure includes a top portion with a top length and a bottom portion with a bottom length, and the top length is greater than the bottom length. The semiconductor device structure also includes a package layer formed between the lid structure and the die structure, and a sidewall of the bottom portion of the lid structure is not aligned with a sidewall of the die structure.