利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

385 条记录 (耗时 0.027 秒)

    Multilayer wiring board and its manufacturing method
    14.
    发明授权
    Multilayer wiring board and its manufacturing method 失效
    多层布线板及其制造方法

    公开(公告)号：US08076589B2

    公开(公告)日：2011-12-13

    申请号：US11629311

    申请日：2006-04-26

    申请人： Tadashi Nakamura ,  Fumio Echigo ,  Shogo Hirai

    发明人： Tadashi Nakamura ,  Fumio Echigo ,  Shogo Hirai

    IPC分类号： H05K1/11

    CPC分类号： H05K3/4655 ,  H05K1/0366 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49155

    摘要： A multilayer wiring board employs a thin insulating substrate having substantially only resin flow as the compression property effect, and has an any-layer IVH structure where at least one core layer is formed without burying wiring. For sufficiently securing an effective compression amount of the crush-allowance of a conductor, the ratio of the thickness of a cover film to that of the electrical insulating substrate is increased, and a via can be formed in the core layer without burying the wiring in the insulating substrate. Thus, a multilayer wiring board having an any-layer IVH structure that can achieve high-density component mountability and wiring storability in an extremely small thickness can be provided.

    摘要翻译： 多层布线板采用基本上只有树脂流动的薄绝缘基板作为压缩性能效果，并且具有其中形成至少一个芯层而不掩埋布线的任何层IVH结构。 为了充分确保导体的挤压容许的有效压缩量，覆盖膜的厚度与电绝缘基板的厚度的比例增加，并且可以在芯层中形成通孔而不将布线埋入 绝缘基板。 因此，可以提供具有能够实现高密度部件安装性和极小厚度的布线保持性的任何层IVH结构的多层布线板。

    Multilayer printed wiring board and manufacturing method thereof
    15.
    发明授权
    Multilayer printed wiring board and manufacturing method thereof 失效
    多层印刷电路板及其制造方法

    公开(公告)号：US07956293B2

    公开(公告)日：2011-06-07

    申请号：US11910560

    申请日：2007-04-02

    申请人： Fumio Echigo ,  Shogo Hirai ,  Tadashi Nakamura

    发明人： Fumio Echigo ,  Shogo Hirai ,  Tadashi Nakamura

    IPC分类号： H05K1/11

    CPC分类号： H05K3/4069 ,  H05K1/0366 ,  H05K3/4614 ,  H05K3/4632 ,  H05K3/4652 ,  H05K2201/0129 ,  H05K2201/0278 ,  H05K2201/0355 ,  H05K2201/068 ,  H05K2203/1461 ,  Y10T29/49124

    摘要： A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.

    摘要翻译： 多层印刷布线板的特征在于，通孔中的层间连接材料的厚度方向的热膨胀系数比由绝缘材料制成的电绝缘基板的热膨胀系数小; 层间连接形成在高于工作温度的温度下; 并且层间连接材料的厚度大于常温下相同布线层的层间连接材料。 这导致在使用环境中印刷电路板的厚度方向上的不同材料之间的热膨胀系数的差异导致高连接可靠性。

    Multilayer Wiring Board and Its Manufacturing Method
    16.
    发明申请
    Multilayer Wiring Board and Its Manufacturing Method 失效
    多层接线板及其制造方法

    公开(公告)号：US20080308304A1

    公开(公告)日：2008-12-18

    申请号：US11629311

    申请日：2006-04-26

    申请人： Tadashi Nakamura ,  Fumio Echigo ,  Shogo Hirai

    发明人： Tadashi Nakamura ,  Fumio Echigo ,  Shogo Hirai

    IPC分类号： H05K1/05 ,  H05K3/10

    CPC分类号： H05K3/4655 ,  H05K1/0366 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49155

    摘要： A multilayer wiring board employs a thin insulating substrate having substantially only resin flow as the compression property effect, and has an any-layer IVH structure where at least one core layer is formed without burying wiring. For sufficiently securing an effective compression amount of the crush-allowance of a conductor, the ratio of the thickness of a cover film to that of the electrical insulating substrate is increased, and a via can be formed in the core layer without burying the wiring in the insulating substrate. Thus, a multilayer wiring board having an any-layer IVH structure that can achieve high-density component mountability and wiring storability in an extremely small thickness can be provided.

    摘要翻译： 多层布线板采用基本上只有树脂流动的薄绝缘基板作为压缩性能效果，并且具有其中形成至少一个芯层而不掩埋布线的任何层IVH结构。 为了充分确保导体的挤压容许的有效压缩量，覆盖膜的厚度与电绝缘基板的厚度的比例增加，并且可以在芯层中形成通孔而不将布线埋入 绝缘基板。 因此，可以提供具有能够实现高密度部件安装性和极小厚度的布线保持性的任何层IVH结构的多层布线板。

    Multilayer Printed Wiring Board And Manufacturing Method For Same
    17.
    发明申请
    Multilayer Printed Wiring Board And Manufacturing Method For Same 审中-公开
    多层印刷线路板及其制造方法相同

    公开(公告)号：US20080121416A1

    公开(公告)日：2008-05-29

    申请号：US11666607

    申请日：2006-10-19

    申请人： Shogo Hirai ,  Fumio Echigo ,  Tadashi Nakamura ,  Toshio Sugawa

    发明人： Shogo Hirai ,  Fumio Echigo ,  Tadashi Nakamura ,  Toshio Sugawa

    IPC分类号： H05K1/02 ,  H01R43/00

    CPC分类号： H05K3/4614 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/462 ,  H05K3/4644 ,  H05K3/4658 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/49117

    摘要： In a case of multilayer circuit boards where a plurality of conventional films are used as insulating layers, the films are connected with each other using an adhesive, and therefore, the adhesive sometimes negatively affects reduction in thickness. Therefore, a plurality of two-sided boards with films used therein are pasted together with a paste connection layer interposed therebetween, the paste connection layer being configured such that through holes formed in a prepreg are filled in with a conductive paste which is then cured, and second wires are electrically connected with each other through the conductive paste with which the through holes formed in the paste connection layer in advance are filled in, and thus, a multilayer board can be provided without using an adhesive, and the entirety of the multilayer circuit board can be reduced in thickness.

    摘要翻译： 在使用多个常规膜作为绝缘层的多层电路板的情况下，使用粘合剂将膜彼此连接，因此粘合剂有时不利地影响厚度的减小。 因此，其中使用其中的膜的多个双面板被粘合在一起，其间插入有粘合剂连接层，糊状连接层被构造成使得形成在预浸料中的通孔用导电浆料填充，然后固化， 并且第二导线通过预先形成在糊状连接层中的通孔的导电膏彼此电连接，因此可以不使用粘合剂而提供多层板，并且整个多层 电路板的厚度可以减小。

    Capacitor sheet, method for producing the same, board with built-in capacitors, and semiconductor device
    18.
    发明授权
    Capacitor sheet, method for producing the same, board with built-in capacitors, and semiconductor device 失效
    电容器片，其制造方法，具有内置电容器的板和半导体器件

    公开(公告)号：US06916706B2

    公开(公告)日：2005-07-12

    申请号：US10833817

    申请日：2004-04-27

    申请人： Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

    发明人： Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

    IPC分类号： H01L21/02 ,  H05K1/14 ,  H05K1/16 ,  H05K3/40 ,  H05K3/42 ,  H01L21/8242

    CPC分类号： H05K1/162 ,  H01L28/60 ,  H05K1/141 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09581

    摘要： A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.

    摘要翻译： 电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。 层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。 界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。 电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。 这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。 因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。

    MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF
    19.
    发明申请
    MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF 失效
    多层印刷接线板及其制造方法

    公开(公告)号：US20090139761A1

    公开(公告)日：2009-06-04

    申请号：US11910560

    申请日：2007-04-02

    申请人： Fumio Echigo ,  Shogo Hirai ,  Tadashi Nakamura

    发明人： Fumio Echigo ,  Shogo Hirai ,  Tadashi Nakamura

    IPC分类号： H05K1/11 ,  H05K3/00

    CPC分类号： H05K3/4069 ,  H05K1/0366 ,  H05K3/4614 ,  H05K3/4632 ,  H05K3/4652 ,  H05K2201/0129 ,  H05K2201/0278 ,  H05K2201/0355 ,  H05K2201/068 ,  H05K2203/1461 ,  Y10T29/49124

    摘要： A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.

    摘要翻译： 多层印刷布线板的特征在于，通孔中的层间连接材料的厚度方向的热膨胀系数比由绝缘材料制成的电绝缘基板的热膨胀系数小; 层间连接形成在高于工作温度的温度下; 并且层间连接材料的厚度大于常温下相同布线层的层间连接材料。 这导致在使用环境中印刷电路板的厚度方向上的不同材料之间的热膨胀系数的差异导致高连接可靠性。

    Method of manufacturing a double-sided circuit board
    20.
    发明授权
    Method of manufacturing a double-sided circuit board 失效
    制造双面电路板的方法

    公开(公告)号：US07174632B2

    公开(公告)日：2007-02-13

    申请号：US10754416

    申请日：2004-01-09

    申请人： Yoshihiro Kawakita ,  Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura

    发明人： Yoshihiro Kawakita ,  Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura

    IPC分类号： H01K3/10

    CPC分类号： H05K3/4626 ,  H05K1/036 ,  H05K1/0366 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4658 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0278 ,  H05K2201/0293 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249996

    摘要： A circuit board including a desired number of electrically insulating layers and wiring layers laminated alternately, and an inner via hole for securing an electrical connection between the wiring layers by compressing and hardening a conductive paste including a conductive particle and a resin. In the electrically insulating layer, a porous sheet is provided a resin sheet at least one surface, and the porous sheet is not impregnated with a resin at least at a central portion. A through hole penetrating the electrically insulating layer in the direction of the thickness of the electrically insulating layer is filled with a conductive paste including a conductive particle and a resin, and pores that are present inside the porous sheet are filled with laminated resin. The average hole diameter of the pores inside the porous sheet may be smaller than the average particle size of the conductive particle. Thereby, it is possible to make the insulating layer of the circuit board securing the interlayer electrically connection by an inner via hole including a conductive paste to be homogenized and ultra-thin and improve the reliability of the connection of the inner via hole.

    摘要翻译： 包括所需数量的电绝缘层和交替层叠的布线层的电路板，以及用于通过压缩和硬化包括导电颗粒和树脂的导电膏来固定布线层之间的电连接的内通孔。 在电绝缘层中，多孔片材至少在一个表面上设置有树脂片，多孔片材至少在中心部分不浸渍树脂。 在电绝缘层的厚度方向贯通电绝缘层的贯通孔填充有包含导电性粒子和树脂的导电性糊剂，并且在多孔质片材内存在的孔填充有层叠树脂。 多孔片内的孔的平均孔径可以小于导电性粒子的平均粒径。 由此，可以使电路基板的绝缘层通过包括导电浆料的内部通孔来确保层间电连接，从而均匀化并且超薄，并提高内部通孔连接的可靠性。