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公开(公告)号:US09006819B2
公开(公告)日:2015-04-14
申请号:US13639738
申请日:2011-02-08
申请人: Shiro Hino , Naruhisa Miura , Shuhei Nakata , Kenichi Ohtsuka , Shoyu Watanabe , Akihiko Furukawa , Yukiyasu Nakao , Masayuki Imaizumi
发明人: Shiro Hino , Naruhisa Miura , Shuhei Nakata , Kenichi Ohtsuka , Shoyu Watanabe , Akihiko Furukawa , Yukiyasu Nakao , Masayuki Imaizumi
IPC分类号: H01L29/66 , H01L29/10 , H01L29/78 , H01L29/861 , H01L29/06 , H01L29/16 , H01L29/40 , H01L29/423 , H01L29/739
CPC分类号: H01L29/1095 , H01L29/0615 , H01L29/0638 , H01L29/0696 , H01L29/1608 , H01L29/402 , H01L29/42372 , H01L29/66068 , H01L29/7395 , H01L29/7805 , H01L29/7811 , H01L29/8611
摘要: A semiconductor device includes a semiconductor substrate of a first conductivity type, a drift layer of the first conductivity type which is formed on a first main surface of the semiconductor substrate, a second well region of a second conductivity type which is formed to surround a cell region of the drift layer, and a source pad for electrically connecting the second well regions and a source region of the cell region through a first well contact hole provided to penetrate a gate insulating film on the second well region, a second well contact hole provided to penetrate a field insulating film on the second well region and a source contact hole.
摘要翻译: 半导体器件包括第一导电类型的半导体衬底,形成在半导体衬底的第一主表面上的第一导电类型的漂移层,形成为围绕电池的第二导电类型的第二阱区域 漂移层的区域和用于通过设置成穿过第二阱区域上的栅极绝缘膜设置的第一阱接触孔电连接第二阱区域和电池区域的源极区域的源极焊盘,提供第二阱接触孔 以穿透第二阱区域上的场绝缘膜和源极接触孔。
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公开(公告)号:US20140203393A1
公开(公告)日:2014-07-24
申请号:US14239375
申请日:2012-07-31
申请人: Tsuyoshi Kawakami , Yoshiyuki Nakaki , Yoshio Fujii , Hiroshi Watanabe , Shuhei Nakata , Kohei Ebihara , Akihiko Furukawa
发明人: Tsuyoshi Kawakami , Yoshiyuki Nakaki , Yoshio Fujii , Hiroshi Watanabe , Shuhei Nakata , Kohei Ebihara , Akihiko Furukawa
IPC分类号: H01L29/872
CPC分类号: H01L29/8725 , H01L29/0619 , H01L29/0623 , H01L29/1608 , H01L29/8611 , H01L29/872
摘要: A semiconductor device having high breakdown voltage and high reliability without forming an embedded injection layer with high position accuracy. The semiconductor device includes a base as an active area of a second conductivity type formed on a surface layer of a semiconductor layer of a first conductivity type to constitute a semiconductor element; guard rings as a plurality of first impurity regions of the second conductivity type formed on the surface layer of the semiconductor layer spaced apart from each other to respectively surround the base in plan view; and an embedded injection layer as a second impurity region of the second conductivity type embedded in the surface layer of the semiconductor layer to connect at least two bottom portions of the plurality of guard rings.
摘要翻译: 具有高击穿电压和高可靠性的半导体器件,而不形成具有高定位精度的嵌入式注入层。 半导体器件包括形成在第一导电类型的半导体层的表面层上的第二导电类型的有源区的基底,以构成半导体元件; 保护环作为多个第一导电类型的第一杂质区域,形成在半导体层的表面层上彼此间隔开以在平面图中分别包围基底; 以及作为第二导电类型的第二杂质区域的嵌入式注入层,其嵌入在半导体层的表面层中,以连接多个保护环的至少两个底部。
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公开(公告)号:US20130285140A1
公开(公告)日:2013-10-31
申请号:US13992574
申请日:2011-12-05
CPC分类号: H01L29/063 , H01L29/0623 , H01L29/0696 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/41741 , H01L29/41766 , H01L29/41775 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/6631 , H01L29/66348 , H01L29/66522 , H01L29/66666 , H01L29/66727 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827
摘要: A trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a protective diffusion layer at a portion of a trench underlying a gate electrode at a turn-off time and simultaneously improves a current density by narrowing a cell pitch. The semiconductor device includes a gate electrode embedded into a trench penetrating a base region. The gate electrode is disposed into a lattice shape in a planar view, and a protective diffusion layer is formed in a drift layer at the portion underlying thereof. At least one of blocks divided by the gate electrode is a protective contact region on which the trench is entirely formed. A protective contact for connecting the protective diffusion layer at a bottom portion of the trench and a source electrode is disposed on the protective contact region.
摘要翻译: 一种沟槽栅型半导体器件,其可以防止在关断时在栅电极下方的沟槽部分流入保护扩散层的位移电流引起的栅极绝缘膜的破坏,并且同时通过 缩小细胞间距 半导体器件包括嵌入到穿透基极区域的沟槽中的栅电极。 栅电极在平面图中设置为格子状,并且在其下方的部分的漂移层中形成保护扩散层。 由栅电极分隔的至少一个块是其上完全形成沟槽的保护接触区域。 用于在沟槽的底部连接保护性扩散层和源电极的保护接点设置在保护接触区域上。
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公开(公告)号:US20130153900A1
公开(公告)日:2013-06-20
申请号:US13818993
申请日:2011-08-26
IPC分类号: H01L23/34
CPC分类号: H01L23/34 , G01K7/01 , H01L29/1608 , H01L29/66068 , H01L29/7803 , H01L29/7815 , H01L29/7828 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.
摘要翻译: 一种半导体器件,其能够快速且准确地感测关于其中包含的半导体晶体管的温度的信息。 MOSFET包括多个单元,并且包括主单元组,其包括用于向多个单元之间的负载提供电流的单元,以及包括用于感测关于MOSFET的温度的温度信息的单元的感测单元组。 主电池组和感应电池组具有不同的温度特性,显示电特性随温度变化的变化。 温度检测电路基于例如流过主单元组的主电流的值和流过感测单元组的感测电流的值来感测MOSFET的温度。
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公开(公告)号:US6110291A
公开(公告)日:2000-08-29
申请号:US689313
申请日:1996-08-07
申请人: Kenyu Haruta , Koichi Ono , Hitoshi Wakata , Mutsumi Tsuda , Yoshio Saito , Keisuke Nanba , Kazuyoshi Kojima , Tetsuya Takami , Akihiro Suzuki , Tomohiro Sasagawa , Kenichi Kuroda , Toshiyuki Oishi , Yukihiko Wada , Akihiko Furukawa , Yasuji Matsui , Akimasa Yuki , Takaaki Kawahara , Hideki Yabe , Taisuke Furukawa , Kouji Kise , Noboru Mikami , Tsuyoshi Horikawa , Tetsuo Makita , Kazuo Kuramoto , Naohiko Fujino , Hiroshi Kuroki , Tetsuo Ogama , Junji Tanimura
发明人: Kenyu Haruta , Koichi Ono , Hitoshi Wakata , Mutsumi Tsuda , Yoshio Saito , Keisuke Nanba , Kazuyoshi Kojima , Tetsuya Takami , Akihiro Suzuki , Tomohiro Sasagawa , Kenichi Kuroda , Toshiyuki Oishi , Yukihiko Wada , Akihiko Furukawa , Yasuji Matsui , Akimasa Yuki , Takaaki Kawahara , Hideki Yabe , Taisuke Furukawa , Kouji Kise , Noboru Mikami , Tsuyoshi Horikawa , Tetsuo Makita , Kazuo Kuramoto , Naohiko Fujino , Hiroshi Kuroki , Tetsuo Ogama , Junji Tanimura
IPC分类号: C23C14/02 , C23C14/08 , C23C14/22 , C23C14/28 , C23C14/34 , C23C14/54 , C23C14/56 , C23C14/00
CPC分类号: C23C14/087 , C23C14/022 , C23C14/22 , C23C14/28 , C23C14/3471 , C23C14/54 , C23C14/541 , C23C14/547 , C23C14/564 , Y10S505/732
摘要: A thin film forming apparatus using laser includes a chamber (1), a target (5) placed therein, a laser light source (10) for emitting laser beam to target (5), and a substrate holder (3). When target (5) is irradiated with laser beam (16), a plume (15) is generated, and materials included in plume (15) are deposited on the surface of a substrate (2) held by substrate holder (3). The laser beam emitted from laser light source (10) has its cross section shaped to a desired shape when passed through a shielding plate (4804), for example, so that the surface of the target (5) is irradiated with the beam having uniform light intensity distribution. Therefore, a plume (15) having uniform density distribution of active particles is generated, and therefore a thin film of high quality can be formed over a wide area with uniform film quality, without damaging the substrate.
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公开(公告)号:US09190468B2
公开(公告)日:2015-11-17
申请号:US14355737
申请日:2012-09-24
申请人: Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
发明人: Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Tomokatsu Watanabe , Kenichi Ohtsuka , Hiroshi Watanabe , Yuji Ebiike
IPC分类号: H01L27/118 , H01L21/44 , H01L29/06 , H01L29/739 , H01L29/66 , H01L29/78 , H01L29/16 , H01L29/10 , H01L29/808
CPC分类号: H01L29/0619 , H01L29/0688 , H01L29/0692 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7396 , H01L29/7802 , H01L29/808
摘要: A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction.
摘要翻译: 一种半导体器件,其可以在抑制导通损耗的增加或开关损耗的同时提高可靠性。 在半导体装置中,当在半导体基板的主表面上的二维形状是单位电池时,形状是周期性地设置在漂移层的表面层中的多个阱区域的重复单元,一个单元电池 并且在x轴方向上相邻的另一个单元单元在y轴方向上不对准地设置,并且在y轴方向上相邻的一个单位单元和另一个单位单元在x轴方向上不对准地设置。
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17.
公开(公告)号:US09111751B2
公开(公告)日:2015-08-18
申请号:US13995993
申请日:2011-05-18
IPC分类号: H01L23/58 , H01L21/02 , H01L21/82 , H01L27/06 , H01L29/66 , H01L29/78 , H01L29/872 , H01L29/47 , H01L29/16 , H01L29/45 , H01L29/06
CPC分类号: H01L21/02529 , H01L21/8213 , H01L27/0629 , H01L29/0619 , H01L29/0692 , H01L29/1608 , H01L29/45 , H01L29/47 , H01L29/6606 , H01L29/66068 , H01L29/7802 , H01L29/7828 , H01L29/872
摘要: A silicon carbide semiconductor device including an SBD measuring a temperature of a silicon carbide semiconductor element. The silicon carbide semiconductor device includes a MOSFET formed on a silicon carbide epitaxial substrate, and an SBD section measuring a temperature of the MOSFET. The SBD section includes an n-type cathode region in a surface portion of a silicon carbide drift layer; an anode titanium electrode formed on the cathode region, the electrode serving as a Schottky electrode; an n-type cathode contact region of a higher concentration than that of the cathode region, formed in the surface portion of the silicon carbide drift layer to make contact with the cathode region; a cathode ohmic electrode formed on the cathode contact region; and a first p-type well region formed within the silicon carbide drift layer to surround peripheries of the cathode region and the cathode contact region.
摘要翻译: 一种碳化硅半导体器件,包括测量碳化硅半导体元件的温度的SBD。 碳化硅半导体器件包括形成在碳化硅外延衬底上的MOSFET和测量MOSFET的温度的SBD部分。 SBD部分包括在碳化硅漂移层的表面部分中的n型阴极区域; 在阴极区域形成的阳极钛电极,用作肖特基电极的电极; 形成在碳化硅漂移层的表面部分中以与阴极区接触的n型阴极接触区域,其浓度高于阴极区域; 形成在阴极接触区域上的阴极欧姆电极; 以及形成在碳化硅漂移层内以围绕阴极区域和阴极接触区域的周边的第一p型阱区域。
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公开(公告)号:US08785931B2
公开(公告)日:2014-07-22
申请号:US13818993
申请日:2011-08-26
CPC分类号: H01L23/34 , G01K7/01 , H01L29/1608 , H01L29/66068 , H01L29/7803 , H01L29/7815 , H01L29/7828 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.
摘要翻译: 一种半导体器件,其能够快速且准确地感测关于其中包含的半导体晶体管的温度的信息。 MOSFET包括多个单元,并且包括主单元组,其包括用于向多个单元之间的负载提供电流的单元,以及包括用于感测关于MOSFET的温度的温度信息的单元的感测单元组。 主电池组和感应电池组具有不同的温度特性,显示电特性随温度变化的变化。 温度检测电路基于例如流过主单元组的主电流的值和流过感测单元组的感测电流的值来感测MOSFET的温度。
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19.
公开(公告)号:US20140077232A1
公开(公告)日:2014-03-20
申请号:US14116067
申请日:2012-03-07
申请人: Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
发明人: Shiro Hino , Naruhisa Miura , Akihiko Furukawa , Yukiyasu Nakao , Tomokatsu Watanabe , Masayoshi Tarutani , Yuji Ebiike , Masayuki Imaizumi , Sunao Aya
CPC分类号: H01L29/1608 , H01L21/0485 , H01L29/0615 , H01L29/0638 , H01L29/41766 , H01L29/45 , H01L29/66068 , H01L29/7802 , H01L29/7811 , H01L29/7816 , H01L29/7845 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.
摘要翻译: 能够抑制阈值电压的时间变化的半导体器件及其制造方法。 根据本发明的半导体器件包括形成在半导体衬底上的漂移层,形成在漂移层的表面层中的第一阱区彼此分开,形成在栅极绝缘膜上的栅极绝缘膜,在漂移层上延伸,每个 选择性地形成在栅极绝缘膜上的栅极电极,穿过栅极绝缘膜并到达每个第一阱区域的内部的源极接触孔以及至少形成在第一阱区上的残留压应力层, 源接触孔的侧表面,其中保持压缩应力。
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公开(公告)号:US20130168700A1
公开(公告)日:2013-07-04
申请号:US13806534
申请日:2010-06-24
申请人: Akihiko Furukawa , Yasuhiro Kagawa , Naruhisa Miura , Shiro Hino , Shuhei Nakata , Kenichi Ohtsuka , Shoyu Watanabe , Masayuki Imaizumi
发明人: Akihiko Furukawa , Yasuhiro Kagawa , Naruhisa Miura , Shiro Hino , Shuhei Nakata , Kenichi Ohtsuka , Shoyu Watanabe , Masayuki Imaizumi
IPC分类号: H01L29/78
CPC分类号: H01L29/78 , H01L21/0485 , H01L27/088 , H01L29/0696 , H01L29/45 , H01L29/6606 , H01L29/66068 , H01L29/7805 , H01L29/7815
摘要: In a high speed switching power semiconductor device having a sense pad, a high voltage is generated during switching operations in well regions under the sense pad due to a displacement current flowing through its flow path with a resistance, whereby the power semiconductor device sometimes breaks down by dielectric breakdown of a thin insulating film such as a gate insulating film. In a power semiconductor device according to the invention, sense-pad well contact holes are provided on well regions positioned under the sense pad and penetrate a field insulating film thicker than the gate insulating film to connect to the source pad, thereby improving reliability.
摘要翻译: 在具有感测焊盘的高速开关电力半导体器件中,由于位移电流通过其流动路径而具有电阻,在感测焊盘下的阱区域的开关操作期间产生高电压,由此功率半导体器件有时会分解 通过诸如栅极绝缘膜的薄绝缘膜的电介质击穿。 在根据本发明的功率半导体器件中,感测焊盘井接触孔设置在位于感测焊盘下方的阱区上,并穿透比栅极绝缘膜更厚的场绝缘膜以连接到源极焊盘,从而提高可靠性。
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