公开(公告)号：US06952040B2

公开(公告)日：2005-10-04

申请号：US09895697

申请日：2001-06-29

Applicant: Robert S. Chau ,  Jack Kavalieros ,  Anand Murthy ,  Brian Roberds ,  Brian S. Doyle

Inventor： Robert S. Chau ,  Jack Kavalieros ,  Anand Murthy ,  Brian Roberds ,  Brian S. Doyle

IPC: H01L21/3205 ,  H01L21/336 ,  H01L29/49 ,  H01L29/76 ,  H01L29/786 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L29/66772 ,  H01L29/41783 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/78654 ,  Y10S977/70 ,  Y10S977/721 ,  Y10S977/936

Abstract: A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.

Abstract translation: 一种新颖的晶体管结构及其制造方法。 根据本发明，晶体管包括具有第一表面的本征硅体。 在本征硅体的第一表面上形成栅极电介质。 栅极电极形成在栅极电介质上，其中栅电极在栅极电介质上包括中间间隙功函数膜。 一对源极/漏极区域形成在本征硅体的相对侧上。

公开(公告)号：US20050214987A1

公开(公告)日：2005-09-29

申请号：US10809853

申请日：2004-03-24

Applicant: Uday Shah ,  Chris Barns ,  Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Robert Chau

Inventor： Uday Shah ,  Chris Barns ,  Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Robert Chau

IPC: H01L21/00 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/84

CPC classification number: H01L29/66772 ,  H01L21/84 ,  H01L29/66545

Abstract: A method for making a semiconductor device is described. That method comprises forming a polysilicon layer on a dielectric layer, which is formed on a substrate. The polysilicon layer is etched to generate a patterned polysilicon layer with an upper surface that is wider than its lower surface. The method may be applied, when using a replacement gate process to make transistors that have metal gate electrodes.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在形成在基板上的电介质层上形成多晶硅层。 蚀刻多晶硅层以产生具有比其下表面更宽的上表面的图案化多晶硅层。 当使用替换栅极工艺来制造具有金属栅电极的晶体管时，可以应用该方法。

公开(公告)号：US20050199950A1

公开(公告)日：2005-09-15

申请号：US11123565

申请日：2005-05-06

Applicant: Robert Chau ,  Brian Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

Inventor： Robert Chau ,  Brian Doyle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

IPC: H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94

CPC classification number: H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

Abstract: The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US20050199949A1

公开(公告)日：2005-09-15

申请号：US10923472

申请日：2004-08-20

Applicant: Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

Inventor： Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

IPC: H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/00 ,  H01L29/76

CPC classification number: H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

Abstract: The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US06939815B2

公开(公告)日：2005-09-06

申请号：US10652796

申请日：2003-08-28

Applicant: Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  John P. Barnak ,  Matthew V. Metz ,  Jack Kavalieros ,  Robert S. Chau

Inventor： Justin K. Brask ,  Mark L. Doczy ,  Scott A. Hareland ,  John P. Barnak ,  Matthew V. Metz ,  Jack Kavalieros ,  Robert S. Chau

IPC: H01L21/28 ,  H01L21/30 ,  H01L21/306 ,  H01L21/316 ,  H01L29/51 ,  H01L21/31

CPC classification number: H01L21/02244 ,  H01L21/02052 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517

Abstract: A method for making a semiconductor device is described. That method comprises forming a metal oxide layer on a substrate, converting at least part of the metal oxide layer to a metal layer; and oxidizing the metal layer to generate a metal oxide high-k gate dielectric layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在基板上形成金属氧化物层，将金属氧化物层的至少一部分转化为金属层; 并氧化金属层以产生金属氧化物高k栅极电介质层。

公开(公告)号：US20050148136A1

公开(公告)日：2005-07-07

申请号：US10748559

申请日：2003-12-29

Applicant: Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Matthew Metz ,  Chris Barns ,  Uday Shah ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

Inventor： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Matthew Metz ,  Chris Barns ,  Uday Shah ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

IPC: H01L21/8238 ,  H01L23/48

CPC classification number: H01L21/28097 ,  H01L21/823835 ,  H01L21/823842 ,  H01L27/1203 ,  H01L29/4975 ,  H01L29/66545 ,  Y10S438/926

Abstract: A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.

Abstract translation: 对半导体装置及其形成方法进行说明。 半导体器件包括形成在衬底的第一部分上的金属NMOS栅电极和形成在衬底的第二部分上的硅化物PMOS栅电极。

公开(公告)号：US20050148130A1

公开(公告)日：2005-07-07

申请号：US10748545

申请日：2003-12-29

Applicant: Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Uday Shah ,  Chris Barns ,  Robert Chau

Inventor： Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Uday Shah ,  Chris Barns ,  Robert Chau

IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/49 ,  H01L21/338 ,  H01L21/4763

CPC classification number: H01L29/66545 ,  H01L21/28079 ,  H01L21/823842 ,  H01L29/495

Abstract: A method for making a semiconductor device is described. That method comprises forming a hard mask and an etch stop layer on a patterned sacrificial gate electrode layer. After first and second spacers are formed on opposite sides of that patterned sacrificial layer, the patterned sacrificial layer is removed to generate a trench that is positioned between the first and second spacers. At least part of the trench is filled with a metal layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在图案化的牺牲栅极电极层上形成硬掩模和蚀刻停止层。 在第一和第二间隔物形成在该图案化的牺牲层的相对侧上之后，去除图案化的牺牲层以产生位于第一和第二间隔物之间​​的沟槽。 沟槽的至少一部分填充有金属层。

公开(公告)号：US20050101113A1

公开(公告)日：2005-05-12

申请号：US10704497

申请日：2003-11-06

Applicant: Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Robert Chau ,  Robert Turkot

Inventor： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Uday Shah ,  Matthew Metz ,  Robert Chau ,  Robert Turkot

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/8238 ,  H01L29/49 ,  H01L21/3205

CPC classification number: H01L29/4958 ,  H01L21/28079 ,  H01L21/32134 ,  H01L21/823842

Abstract: A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, and forming a first metal layer on a first part of the dielectric layer, leaving a second part of the dielectric layer exposed. After a second metal layer is formed on both the first metal layer and the second part of the dielectric layer, a masking layer is formed on the second metal layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在衬底上形成电介质层，并且在介电层的第一部分上形成第一金属层，留下介电层的第二部分露出。 在第一金属层和电介质层的第二部分上形成第二金属层之后，在第二金属层上形成掩模层。

公开(公告)号：US20050048794A1

公开(公告)日：2005-03-03

申请号：US10652796

申请日：2003-08-28

Applicant: Justin Brask ,  Mark Doczy ,  Scott Hareland ,  John Barnak ,  Matthew Metz ,  Jack Kavalieros ,  Robert Chau

Inventor： Justin Brask ,  Mark Doczy ,  Scott Hareland ,  John Barnak ,  Matthew Metz ,  Jack Kavalieros ,  Robert Chau

IPC: H01L21/28 ,  H01L21/30 ,  H01L21/306 ,  H01L21/316 ,  H01L29/51 ,  H01L21/336 ,  H01L21/3205 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02244 ,  H01L21/02052 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517

Abstract: A method for making a semiconductor device is described. That method comprises forming a metal oxide layer on a substrate, converting at least part of the metal oxide layer to a metal layer; and oxidizing the metal layer to generate a metal oxide high-k gate dielectric layer.

公开(公告)号：US06667251B2

公开(公告)日：2003-12-23

申请号：US10460498

申请日：2003-06-11

Applicant: Robert McFadden ,  Jack Kavalieros ,  Reza Arghavani ,  Doug Barlage ,  Robert Chau

Inventor： Robert McFadden ,  Jack Kavalieros ,  Reza Arghavani ,  Doug Barlage ,  Robert Chau

IPC: H01L2131

CPC classification number: H01L21/28202 ,  H01L21/3144 ,  H01L29/518

Abstract: A method of forming a dielectric layer suitable for use as the gate dielectric layer in a MOSFET includes nitridizing a thin silicon oxide film in a low power, direct plasma formed from nitrogen. A gas having a lower ionization energy than nitrogen, such as for example, helium, may be used in combination with nitrogen to produce a lower power plasma resulting in a steeper concentration curve for nitrogen in the silicon oxide film.

Abstract translation: 形成适合用作MOSFET中的栅极电介质层的电介质层的方法包括：在由氮形成的低功率直接等离子体中氮化薄氧化硅膜。 具有比氮更低的电离能（例如氦）的气体可以与氮组合使用以产生较低功率的等离子体，导致氧化硅膜中氮的浓度曲线更陡。