公开(公告)号：US09035471B2

公开(公告)日：2015-05-19

申请号：US14188732

申请日：2014-02-25

Applicant: ATI Technologies ULC

Inventor： Roden Topacio ,  Gabriel Wong

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC classification number: H01L24/17 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/33 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/1132 ,  H01L2224/13007 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01028 ,  H01L2924/01031

Abstract: A routing layer for a semiconductor die is disclosed. The routing layer includes traces interconnecting integrated circuit bond-pads to UBMs. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces arranged underneath the UBMs as to absorb stress from solder bumps attached to the UMBs. Traces beneath the UBMs protect parts of the underlying dielectric material proximate the solder bumps, from the stress.

Abstract translation: 公开了一种用于半导体管芯的布线层。 路由层包括将集成电路焊盘与UBM相互连接的迹线。 布线层形成在介电材料层上。 路由层包括布置在UBM下方的导电迹线，以吸收附着到UMB的焊料凸起的应力。 UBM下面的痕迹可保护靠近焊料凸块的基底电介质材料的部分不受应力影响。

公开(公告)号：US09021276B2

公开(公告)日：2015-04-28

申请号：US13465680

申请日：2012-05-07

Applicant: Michael J. Osborn ,  Sebastien Nussbaum ,  John P. Petry ,  Umair B. Cheema

Inventor： Michael J. Osborn ,  Sebastien Nussbaum ,  John P. Petry ,  Umair B. Cheema

IPC: G06F1/00 ,  G01R19/00 ,  G01K17/00 ,  G05F5/00 ,  G06F1/26 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/3203

Abstract: A method and device for setting a processor performance profile for a processor that is unable to directly measure voltage supplied by a voltage regulator includes determining a voltage requested of the voltage regulator and determining a first characteristic of a first portion of the electrical component. The first characteristic is one of power consumed by the first portion of the electrical component and load presented by the first portion of the electrical component. A first current is then determined by using the first voltage, the first characteristic, and a known relationship therebetween. A third voltage that is an estimate of the voltage supplied by the voltage regulator is then determined by comparing the first current to load line characteristics of the electrical component. The third voltage is then used to manage performance of the processor.

Abstract translation: 用于设置不能直接测量由电压调节器提供的电压的处理器的处理器性能特性的方法和装置包括确定所述电压调节器所请求的电压并确定电气部件的第一部分的第一特性。 第一特征是由电气部件的第一部分消耗的功率和由电气部件的第一部分呈现的负载之一。 然后通过使用第一电压，第一特性和它们之间的已知关系来确定第一电流。 然后通过比较电气部件的第一电流与负载线特性来确定作为电压调节器提供的电压的估计的第三电压。 然后第三个电压用于管理处理器的性能。

公开(公告)号：US09008591B2

公开(公告)日：2015-04-14

申请号：US13530361

申请日：2012-06-22

Applicant: Gabriel Abarca ,  Keith Shu Key Lee

Inventor： Gabriel Abarca ,  Keith Shu Key Lee

IPC: H04B1/38 ,  H04L29/06 ,  H04W56/00 ,  H04W76/04

CPC classification number: H04L29/06 ,  H04L65/1083 ,  H04L65/605 ,  H04L65/80 ,  H04L67/1095 ,  H04W56/00 ,  H04W76/25

Abstract: An apparatus and method is provided for improving initialization and synchronization of display devices to audio data. Current implementations to retain synchronization between a transmitter and a display use “Keep Alive” silent audio data stream in the format of the latest data stream on an interface between the transmitter and the display even when no data is available. Implementing the above solution in a system where the silent audio data stream is transmitted over a wireless link is bandwidth and power inefficient. The techniques provide an apparatus and method to efficiently generate and transmit silent audio data stream for maintaining synchronization.

Abstract translation: 提供了一种用于改善显示设备到音频数据的初始化和同步的装置和方法。 保持发射机和显示器之间的同步的当前实施方式，即使没有数据可用，在发射机和显示器之间的接口上以最新数据流的格式使用“保持活动”静音音频数据流。 在无线音频数据流通过无线链路发送的系统中实现上述解决方案是带宽和功率低效。 这些技术提供了一种用于有效地生成和发送静音音频数据流以保持同步的装置和方法。

公开(公告)号：US08954804B2

公开(公告)日：2015-02-10

申请号：US12173456

申请日：2008-07-15

Applicant: Alwyn Dos Remedios

Inventor： Alwyn Dos Remedios

IPC: G06F11/00 ,  G06F21/51 ,  G06F11/22 ,  G06F21/57

CPC classification number: G06F21/51 ,  G06F11/2284 ,  G06F21/575 ,  G06F2221/2105

Abstract: A circuit includes a circuit identification storage module and a control module. The circuit identification storage module stores circuit identification information. The control module receives the circuit identification information and in response thereto selectively performs a secure boot procedure or a test boot procedure. The control circuit performs the secure boot procedure when the circuit identification information indicates that the circuit is a production circuit. The control circuit performs the test boot procedure when the circuit identification information indicates that the circuit is a test circuit. A related method is also disclosed.

Abstract translation: 电路包括电路识别存储模块和控制模块。 电路识别存储模块存储电路识别信息。 控制模块接收电路识别信息，并响应于此选择性地执行安全引导过程或测试引导过程。 当电路识别信息指示电路是生产电路时，控制电路执行安全启动程序。 当电路识别信息指示电路是测试电路时，控制电路执行测试引导过程。 还公开了相关方法。

公开(公告)号：US08937621B2

公开(公告)日：2015-01-20

申请号：US12604216

申请日：2009-10-22

Applicant: Collis Quinn Troy Carter

Inventor： Collis Quinn Troy Carter

IPC: G06F13/14 ,  G06F1/00 ,  G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3253 ,  G06F1/3265 ,  Y02D10/151 ,  Y02D10/153 ,  Y02D50/20

Abstract: Apparatus and methods for reducing power consumption of a data transfer interface in a computer system are disclosed. In one embodiment, a method for reducing power consumption of a data transfer interface between a first device and a second device, includes, identifying a free interval between a first data and a second data, disabling the data transfer interface during the free interval, enabling the data transfer interface at the end of the free interval, and transmitting the second data. The method may also include a step of notifying the second device that the data transfer interface is being temporarily disabled. Another embodiment, for example, includes the transfer of display data (or video frames) over an interface, such as, a DisplayPort interface, between a graphics controller device and a timing controller device in a computer system.

Abstract translation: 公开了一种用于降低计算机系统中的数据传输接口的功耗的装置和方法。 在一个实施例中，一种用于降低第一设备和第二设备之间的数据传输接口的功耗的方法包括：识别第一数据和第二数据之间的空闲间隔，在空闲间隔期间禁用数据传输接口，使能 在空闲间隔结束时的数据传输接口，并发送第二数据。 该方法还可以包括通知第二设备数据传输接口被暂时禁用的步骤。 例如，另一个实施例包括在计算机系统中的图形控制器设备和定时控制器设备之间的诸如DisplayPort接口的接口上的显示数据（或视频帧）的传送。

公开(公告)号：US08927344B2

公开(公告)日：2015-01-06

申请号：US13671727

申请日：2012-11-08

Applicant: Roden Topacio ,  Adam Zbrzezny

Inventor： Roden Topacio ,  Adam Zbrzezny

IPC: H01L21/00 ,  H01L21/44 ,  H01L23/31 ,  H05K1/02 ,  H01L23/16 ,  H01L23/00 ,  H05K3/34

CPC classification number: H01L23/3128 ,  H01L23/16 ,  H01L23/562 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/09136 ,  H05K2201/09781 ,  H05K2203/043 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Various semiconductor chip package substrates with reinforcement and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a package substrate that has a first side and a second side opposite to the first side. The first side has a central area adapted to receive a semiconductor chip. A solder reinforcement structure is formed on the first side of the package substrate outside of the central area to resist bending of the package substrate.

公开(公告)号：US20140344587A1

公开(公告)日：2014-11-20

申请号：US13898025

申请日：2013-05-20

Applicant: ATI Technologies ULC

Inventor： Yury Lichmanov

IPC: G06F1/26

CPC classification number: G06F1/3206 ,  G06F1/3209 ,  G06F1/3215 ,  G06F1/324 ,  Y02D10/126

Abstract: An apparatus, computer readable medium, and method of event based dynamic power management. The method includes responding to receiving an indication of an event that is external to a hardware block engine by adjusting the power to the hardware block engine, if the event indicates that the power to the hardware block engine should be adjusted. The method may include receiving a second event that is external to the hardware block engine. The method may include determining whether or not the power should be adjusted to the hardware block engine based on the event and the second event. If it is determined that the power should be adjusted, then the power may be adjusted to the hardware block based on the event and second event. A method of monitoring a component and sending an indication of an event that the component will not require a hardware block engine is disclosed.

Abstract translation: 一种装置，计算机可读介质和基于事件的动态功率管理方法。 该方法包括响应于如果事件指示应该调整硬件块引擎的电力，则通过调整对硬件块引擎的功率来接收对硬件块引擎外部的事件的指示。 该方法可以包括接收硬件块引擎外部的第二事件。 该方法可以包括基于事件和第二事件确定是否应该将功率调整到硬件块引擎。 如果确定应该调整功率，则可以基于事件和第二事件将功率调整到硬件块。 公开了一种监视组件并发送组件不需要硬件块引擎的事件的指示的方法。

公开(公告)号：US08879680B2

公开(公告)日：2014-11-04

申请号：US13670062

申请日：2012-11-06

Applicant: ATI Technologies ULC

Inventor： Michael Tresidder ,  Gordon F. Caruk

IPC: H04L7/00

CPC classification number: G06F13/4273 ,  H04L7/005 ,  H04L2007/045

Abstract: A transmitting interconnect interface inserts clock mismatch compensation symbols into a transmitted data stream so as to allow the receiving interconnect interface to compensate for clock frequency mismatch between transmit-side and receive-side clocks. The transmitting interconnect interface adjusts the rate of insertion of these symbols based on a determination of the clock frequency mismatch. The transmitting interconnect interface can incrementally adjust the insertion rate to change substantially proportionally with changes in the clock frequency mismatch. Alternatively, the transmitting interconnect interface can set the insertion rate to one of two levels. By adapting the insertion rate to the current measured clock frequency mismatch, the bandwidth penalty incurred by transmitting clock mismatch compensation symbols in excess of that necessary to permit receiver clock tolerance compensation can be reduced, thereby permitting more transmit bandwidth to be used for transmitting data.

Abstract translation: 发射互连接口将时钟失配补偿符号插入到发送的数据流中，以便允许接收互连接口补偿发射侧和接收侧时钟之间的时钟频率失配。 发射互连接口基于时钟频率不匹配的确定来调整这些符号的插入速率。 发射互连接口可以逐渐地调整插入速率，以随时钟频率不匹配的变化大幅成比例地变化。 或者，发送互连接口可以将插入速率设置为两个级别之一。 通过将插入速率调整到当前测量的时钟频率失配，可以减少传输时钟失配补偿符号超过允许接收机时钟容限补偿所必需的带宽损失，从而允许更多的发送带宽用于发送数据。

公开(公告)号：US08866825B2

公开(公告)日：2014-10-21

申请号：US12968636

申请日：2010-12-15

Applicant: Jeffrey G. Cheng

Inventor： Jeffrey G. Cheng

IPC: G06F15/80 ,  G06T1/20

CPC classification number: G06T1/20

Abstract: An apparatus includes a plurality of image processing circuits. Each image processing circuit generates an image frame corresponding to a single large surface. The first image processing circuit provides a portion of the generated image frame for a first display or plurality of displays and provides a remaining portion of the image frame to the remaining image processing circuits. The next image processing circuits provides the remaining portion of the image frame for the next plurality of displays.

Abstract translation: 一种装置包括多个图像处理电路。 每个图像处理电路产生对应于单个大表面的图像帧。 第一图像处理电路为第一显示器或多个显示器提供生成的图像帧的一部分，并且将剩余的图像帧部分提供给剩余的图像处理电路。 下一个图像处理电路为下一个多个显示器提供图像帧的剩余部分。

公开(公告)号：US08854344B2

公开(公告)日：2014-10-07

申请号：US13324685

申请日：2011-12-13

Applicant: David Glen

Inventor： David Glen

IPC: G06F3/038 ,  G09G5/00 ,  G09G5/36 ,  G09G5/12

CPC classification number: G09G5/363 ,  G09G5/003 ,  G09G5/006 ,  G09G5/12 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2360/18 ,  G09G2370/04 ,  G09G2370/10

Abstract: In an embodiment, a method in a device of controlling a display is provided. The method includes transmitting a heartbeat signal in a self-refresh state. The heartbeat signal is configured to be used by a display to remain in sync with the device while the device is in the self-refresh state.

Abstract translation: 在一个实施例中，提供了一种控制显示器的设备中的方法。 该方法包括在自刷新状态下发送心跳信号。 当设备处于自刷新状态时，心跳信号被配置为由显示器用于与设备保持同步。