Flash memory system using memory cell as source line pull down circuit
    267.
    发明授权
    Flash memory system using memory cell as source line pull down circuit 有权
    闪存系统使用存储单元作为源极线下拉电路

    公开(公告)号:US09564238B1

    公开(公告)日:2017-02-07

    申请号:US14919005

    申请日:2015-10-21

    Abstract: The present invention relates to a flash memory device that uses dummy memory cells as source line pull down circuits. In one embodiment, when a memory cell is in read mode or erase mode, its source line is coupled to ground through a bitline of a dummy memory cell, which in turn is coupled to ground. When the memory cell is in program mode, the bitline of the dummy memory cell is coupled to an inhibit voltage, which places the dummy memory cell in a program inhibit mode that maintains the dummy memory cell in erased state.

    Abstract translation: 本发明涉及使用虚拟存储单元作为源极线下拉电路的闪速存储器件。 在一个实施例中,当存储器单元处于读取模式或擦除模式时,其源极线通过虚拟存储器单元的位线耦合到地,而虚拟存储器单元进一步耦合到地。 当存储器单元处于编程模式时,虚拟存储单元的位线被耦合到禁止电压,这使得虚拟存储单元处于将虚拟存储单元维持为擦除状态的程序禁止模式。

    Method of making embedded memory device with silicon-on-insulator substrate
    269.
    发明授权
    Method of making embedded memory device with silicon-on-insulator substrate 有权
    使用绝缘体上硅衬底制造嵌入式存储器件的方法

    公开(公告)号:US09431407B2

    公开(公告)日:2016-08-30

    申请号:US14491596

    申请日:2014-09-19

    Abstract: A method of forming a semiconductor device starts with a substrate of silicon, a first insulation layer on the silicon, and a silicon layer on the first insulation layer. The silicon layer and the insulation layer are removed just from a second substrate area. A second insulation layer is formed over the silicon layer in the substrate first area and over the silicon in the second substrate area. A first plurality of trenches is formed in the first substrate area that each extends through all the layers and into the silicon. A second plurality of trenches is formed in the second substrate area that each extends through the second insulation layer and into the silicon. An insulation material is formed in the first and second trenches. Logic devices are formed in the first substrate area, and memory cells are formed in the second substrate area.

    Abstract translation: 形成半导体器件的方法从硅衬底,硅上的第一绝缘层和第一绝缘层上的硅层开始。 仅从第二衬底区域去除硅层和绝缘层。 第二绝缘层形成在衬底第一区域中的硅层之上并且在第二衬底区域中的硅上方。 第一多个沟槽形成在第一衬底区域中,每个沟槽延伸穿过所有层并进入硅中。 第二多个沟槽形成在第二衬底区域中,每个沟槽延伸穿过第二绝缘层并进入硅中。 绝缘材料形成在第一和第二沟槽中。 逻辑器件形成在第一衬底区域中,并且存储器单元形成在第二衬底区域中。

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