公开(公告)号：US07359588B2

公开(公告)日：2008-04-15

申请号：US11302538

申请日：2005-12-14

Applicant: Young Shik Kang ,  Jeha Kim ,  Yong Hwan Kwon ,  Yong Duck Chung

Inventor： Young Shik Kang ,  Jeha Kim ,  Yong Hwan Kwon ,  Yong Duck Chung

IPC: G02B6/12 ,  H01L21/00

CPC classification number: G02F1/01708 ,  B82Y20/00 ,  G02B6/1228 ,  G02B6/136

Abstract: Provided is a double waveguide electroabsorption modulator, in which two spot size converters are integrated between first and second optical waveguides, thereby reducing an insertion loss between an optical fiber and an optical modulator while favorably operating even in high input optical power. Therefore, the electroabsorption modulator can stably operate in higher input optical power while reducing an optical coupling loss and an optical confinement factor (OCF).

Abstract translation: 提供了一种双波导电吸收调制器，其中两个光斑尺寸转换器集成在第一和第二光波导之间，由此即使在高输入光功率的同时也有利于光纤和光调制器之间的插入损耗。 因此，电吸收调制器可以在降低光耦合损耗和光限制因子（OCF）的同时，以更高的输入光功率稳定地工作。

公开(公告)号：US20080055438A1

公开(公告)日：2008-03-06

申请号：US11842993

申请日：2007-08-22

Applicant: Chung-sun Lee ,  Yong-hwan Kwon ,  Un-byoung Kang ,  Woon-seong Kwon ,  Hyung-sun Jang

Inventor： Chung-sun Lee ,  Yong-hwan Kwon ,  Un-byoung Kang ,  Woon-seong Kwon ,  Hyung-sun Jang

IPC: H04N5/335

CPC classification number: H04N5/2253 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The image sensor package includes: an image sensor chip including an image sensing unit which is positioned in an upper central portion thereof and including a plurality of chip bonding pads formed around the image sensing; a transparent board including a lower surface on which a first line electrically connected to the chip bonding pads is formed and the transparent board being arranged with the image sensor chip so that the lower surface faces the image sensing unit; and a plurality of second lines connected to the first line and extending along sidewalls of the image sensor chip to be exposed under a lower surface of the image sensor chip.

Abstract translation: 图像传感器封装包括：图像传感器芯片，其包括位于其上部中央的图像感测单元，并且包括形成在图像感测周围的多个芯片接合焊盘; 形成有与所述芯片接合焊盘电连接的第一线的下表面的透明板，并且所述透明板与所述图像传感器芯片配置使得所述下表面面对所述图像感测单元; 以及连接到第一线并且沿着图像传感器芯片的侧壁延伸以暴露在图像传感器芯片的下表面下方的多个第二线。

公开(公告)号：US20080029923A1

公开(公告)日：2008-02-07

申请号：US11872580

申请日：2007-10-15

Applicant: Kyoung-Sei CHOI ,  Sa-Yoon KANG ,  Yong-Hwan KWON ,  Chung-Sun LEE

Inventor： Kyoung-Sei CHOI ,  Sa-Yoon KANG ,  Yong-Hwan KWON ,  Chung-Sun LEE

IPC: C04B35/00

CPC classification number: H05K3/28 ,  H05K1/036 ,  H05K1/0393 ,  H05K3/101 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0129 ,  H05K2201/0162 ,  H05K2201/09036 ,  H05K2203/0108 ,  H05K2203/0759 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916

Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

Abstract translation: 根据本发明的制造带布线板的方法可以在形成布线图案中采用压印工艺，从而减少制造带布线板的工艺的数量，并允许制造工艺在单个生产线中进行。 因此，制造时间和成本可能降低。 布线图案的轮廓可以通过模具的印模图案的形状来确定。 这可以建立内部和外部引线的顶部宽度并且结合细小的垫间距。 虽然ILB和OLB过程可能使用NCP，但是由于软和弹性布线图案可能建立连接可靠性。

公开(公告)号：US07115483B2

公开(公告)日：2006-10-03

申请号：US10962591

申请日：2004-10-13

Applicant: Yong Hwan Kwon ,  Se Yong Oh ,  Sa Yoon Kang

Inventor： Yong Hwan Kwon ,  Se Yong Oh ,  Sa Yoon Kang

IPC: H01L21/00 ,  H01L21/44 ,  H01L21/30 ,  H01L23/02

CPC classification number: H01L23/3121 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A stacked chip package includes a substrate having an upper surface and a lower surface, a first semiconductor chip having an upper surface and a lower surface, wherein the lower surface of the first semiconductor chip is attached to the upper surface of the substrate and the upper surface of the first semiconductor chip includes a plurality of first electrode pads, and a second semiconductor chip having an upper surface and a lower surface. The lower surface of the second semiconductor chip is attached to the upper surface of the first semiconductor chip, and the lower surface of the second semiconductor chip includes trenches that correspond to the locations of the first electrode pads on the upper surface of the first semiconductor chip.

公开(公告)号：US20060202334A1

公开(公告)日：2006-09-14

申请号：US11421680

申请日：2006-06-01

Applicant: Yong-Hwan KWON ,  Sa-Yoon Kang ,  Chung-Sun Lee

Inventor： Yong-Hwan KWON ,  Sa-Yoon Kang ,  Chung-Sun Lee

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/11 ,  H01L23/3114 ,  H01L24/12 ,  H01L24/16 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: Provided are a method of forming a bump whose upper surface is substantially flat and whose area can be enlarged in a uniform pad pitch to simplify mounting a liquid crystal display drive IC (LDI) and a semiconductor chip and a mount structure using the method to minimize a pad area inside the chip. Thus, the pad area on an edge of a conventional chip is minimized and the bump is formed in a substantially flat location inside the chip and an electrical connection between the pad and the bump is performed by a redistribution metal line.

Abstract translation: 提供了一种形成凸起的方法，该凸块的上表面基本上是平的，并且其面积可以以均匀的垫间距扩大，以简化安装液晶显示驱动IC（LDI）和半导体芯片以及使用该方法的安装结构 芯片内部的焊盘区域。 因此，传统芯片的边缘上的焊盘区域被最小化，并且凸块形成在芯片内部的基本上平坦的位置，并且焊盘和凸块之间的电连接由再分布金属线执行。

公开(公告)号：US07005687B2

公开(公告)日：2006-02-28

申请号：US10682549

申请日：2003-10-08

Applicant: Joong Seon Choe ,  Yong Hwan Kwon

Inventor： Joong Seon Choe ,  Yong Hwan Kwon

IPC: H01L29/72

CPC classification number: H01L31/102

Abstract: The present invention provides the photodetector comprising a lower cladding layer including a n-type doped region, an absorbing layer, an upper cladding layer including a p-type doped region, and ohmic electrodes connected to said lower cladding layer and said upper cladding layer, wherein said p-type doped region extends to be formed into said absorbing layer by a predetermined length.In accordance with present invention, by reducing effect of the hetero junction barrier where holes move in the intrinsic region, the operating voltage can be decreased and the bandwidth can be improved.

Abstract translation: 本发明提供一种光检测器，其包括：包括n型掺杂区的下包层，吸收层，包含p型掺杂区的上包层和连接到所述下包层和所述上覆层的欧姆电极， 其中所述p型掺杂区域延伸以形成所述吸收层预定长度。

公开(公告)号：US06235552B1

公开(公告)日：2001-05-22

申请号：US09482160

申请日：2000-01-12

Applicant: Yong Hwan Kwon ,  Sa Yoon Kang

Inventor： Yong Hwan Kwon ,  Sa Yoon Kang

IPC: H01L2144

CPC classification number: H01L24/94 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L2221/68359 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/03003 ,  H01L2224/03438 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2224/02 ,  H01L2924/00 ,  H01L2224/03

Abstract: A method for manufacturing a chip scale package includes: providing a redistribution substrate; attaching a semiconductor wafer to the redistribution substrate; forming external terminals on the redistribution substrate; and separating the semiconductor wafer and the redistribution substrate into individual integrated circuits. The method can further include forming a buffer layer by filling a gap between the semiconductor wafer and the redistribution substrate with a dielectric material. Another method is the same as the method described above except that instead of the semiconductor wafer, individual integrated circuit chips attach to the redistribution substrate. Meanwhile, a semiconductor package includes: a semiconductor integrated circuit having chip pads formed thereon; interconnection bumps overlying on the chip pads; a patterned metal layer connecting to the interconnetion bumps; a first dielectric layer under the patterned metal layer; a second dielectric layer overlying on the patterned metal layer; and terminal pads connecting to the patterned metal layer. The semiconductor package can further include external terminals connecting to the terminal pads, a third dielectric layer filling a gap between the first dielectric layer and the semiconductor integrated circuit.

Abstract translation: 芯片级封装的制造方法包括：提供再分布基板; 将半导体晶片附接到再分布基板; 在再分布基板上形成外部端子; 以及将半导体晶片和再分配基板分离成单独的集成电路。 该方法还可以包括通过用介电材料填充半导体晶片和再分布基板之间的间隙来形成缓冲层。 另一方法与上述方法相同，除了代替半导体晶片，各个集成电路芯片附着到再分布基板。 同时，半导体封装包括：其上形成有芯片焊盘的半导体集成电路; 互连凸块覆盖在芯片焊盘上; 连接到互连凸块的图案化金属层; 图案化金属层下面的第一介电层; 覆盖在图案化金属层上的第二电介质层; 以及连接到图案化金属层的端子焊盘。 半导体封装还可以包括连接到端子焊盘的外部端子，填充第一介电层和半导体集成电路之间的间隙的第三介电层。

公开(公告)号：US09420327B2

公开(公告)日：2016-08-16

申请号：US13331462

申请日：2011-12-20

Applicant: Jung-a Kim ,  Yong-hwan Kwon ,  Joo-youn Kim ,  Bum-jin Lee

Inventor： Jung-a Kim ,  Yong-hwan Kwon ,  Joo-youn Kim ,  Bum-jin Lee

IPC: G05B11/01 ,  G05B15/00 ,  G06F3/00 ,  G06F3/048 ,  G06F3/14 ,  G06F13/00 ,  H04N5/445 ,  G06F3/041 ,  H04M3/00 ,  H04N21/422

CPC classification number: H04N21/42207 ,  H04N21/42209 ,  H04N21/42224 ,  H04N21/42227

Abstract: A user terminal apparatus and a user interface providing method are provided. The user terminal apparatus providing a control mode to control an apparatus to be controlled and an application mode to operate applications includes a display unit which displays a control mode providing screen and an application mode providing screen, a user interface unit which receives an input of a user's order to select one of the control mode and the application mode, a communication interface unit which communicates with the apparatus to be controlled, and a controller which controls, if the control mode is selected, to display a control screen corresponding to the state of the apparatus to be controlled based on state information of the apparatus to be controlled which is received through the communication interface unit.

Abstract translation: 提供了一种用户终端装置和用户界面提供方法。 提供用于控制要控制的设备的控制模式的用户终端设备和应用模式来应用的应用包括显示控制模式提供屏幕和应用模式提供屏幕的显示单元，用于接收输入的用户界面单元 用户的命令来选择控制模式和应用模式之一，与要控制的设备进行通信的通信接口单元，以及控制器，如果选择了所述控制模式，则控制器显示对应于所述控制模式的状态的控制画面 基于通过通信接口单元接收到的要被控制的设备的状态信息来控制的设备。

公开(公告)号：US08742316B2

公开(公告)日：2014-06-03

申请号：US12942338

申请日：2010-11-09

Applicant: Kisoo Kim ,  Eun Soo Nam ,  Jae-Sik Sim ,  Yong-Hwan Kwon ,  Bongki Mheen ,  Myungsook Oh

Inventor： Kisoo Kim ,  Eun Soo Nam ,  Jae-Sik Sim ,  Yong-Hwan Kwon ,  Bongki Mheen ,  Myungsook Oh

IPC: G01J1/44

CPC classification number: G01J1/46

Abstract: Provided is a photo detector. The photo detector includes: an avalanche photodiode; a bias circuit supplying a bias voltage to one end of the avalanche photodiode; a detection circuit connected to the other end of the avalanche photodiode and detecting a photoelectric current occurring in the avalanche photodiode; and a coupling capacitor connected to the one end or the other end of the avalanche photodiode and supplying a coupling voltage to drive the avalanche photodiode in a Geiger mode.

Abstract translation: 提供了一种光电检测器。 光电检测器包括：雪崩光电二极管; 将偏置电压提供给雪崩光电二极管的一端的偏置电路; 连接到雪崩光电二极管的另一端并检测在雪崩光电二极管中出现的光电流的检测电路; 以及耦合电容器，其连接到雪崩光电二极管的一端或另一端并提供耦合电压以以盖革模式驱动雪崩光电二极管。

公开(公告)号：US08665371B2

公开(公告)日：2014-03-04

申请号：US13354958

申请日：2012-01-20

Applicant: Jung-dae Kim ,  Yong-hwan Kwon ,  Sun-hwa Shin

Inventor： Jung-dae Kim ,  Yong-hwan Kwon ,  Sun-hwa Shin

IPC: H04N5/50

CPC classification number: H04N5/44543 ,  H04N5/44513 ,  H04N5/50 ,  H04N21/4345 ,  H04N21/4755 ,  H04N21/485

Abstract: A method is provided for controlling a television including a user input part for manipulating a channel adjusting item. The method includes displaying a channel map showing a predetermined number of channels including a tuned broadcast channel if the channel adjusting item is selected through the user input part, and a channel setting information menu corresponding to one of the channels shown in the channel map. Thus, the television control method not only allows a user to easily and simply recognize a channel setting state according to channels when the user wants to adjust channel-related functions, but also allows a user to conveniently and effectively adjust the channel setting state according to the channels.

Abstract translation: 提供了一种用于控制包括用于操纵频道调整项目的用户输入部分的电视的方法。 该方法包括如果通过用户输入部分选择频道调整项目，则显示示出包括调谐广播频道的预定数量频道的频道映射，以及对应于频道映射中所示频道之一的频道设置信息菜单。 因此，电视控制方法不仅允许用户在用户想要调整频道相关功能时，根据频道轻松简单地识别频道设置状态，而且还允许用户根据频道设置状态方便有效地调整频道设置状态 渠道。