公开(公告)号：US4595601A

公开(公告)日：1986-06-17

申请号：US736211

申请日：1985-05-20

申请人： Keiji Horioka ,  Haruo Okano ,  Makoto Sekine

发明人： Keiji Horioka ,  Haruo Okano ,  Makoto Sekine

IPC分类号： C04B41/45 ,  C04B41/81 ,  C23C8/04 ,  C23C16/04 ,  H01L21/316 ,  H01L21/32 ,  H01L21/762 ,  B05D3/06

CPC分类号： H01L21/02238 ,  C04B41/4505 ,  C04B41/81 ,  C23C16/047 ,  C23C8/04 ,  H01L21/02255 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76224 ,  H01L21/76281

摘要： An insulation layer is selectively formed by exposing the surface of a workpiece to an atmosphere comprising a mixture of a halogen-based gas and a raw gas containing a compoundable element chemically bondable with an element of a material constituting surface layer of the workpiece to form an insulating compound. The surface layer of the workpiece is formed of a non-insulating material, such as a metallic material or a semiconductor material. Light rays are directly irradiated on the selected region or regions of the surface of the workpiece through the atmosphere of the gaseous mixture, thereby dissociating said halogen-based gas. As a result, a layer comprising the insulating compound is formed on the selected region of the surface of the workpiece on which the light rays have been directly irradiated.

摘要翻译： 通过将工件的表面暴露于包含卤素类气体和含有与构成工件的表面层的材料的元素进行化学键合的可复合元素的原料气体的混合物的气氛来选择性地形成绝缘层，以形成 绝缘化合物。 工件的表面层由诸如金属材料或半导体材料的非绝缘材料形成。 通过气体混合物的气氛将光线直接照射在工件表面的选定区域或区域上，从而解离所述卤素类气体。 结果，在直接照射光线的工件的表面的选定区域上形成包含绝缘化合物的层。

公开(公告)号：US07169697B2

公开(公告)日：2007-01-30

申请号：US10983746

申请日：2004-11-09

申请人： Shoji Seta ,  Makoto Sekine ,  Naofumi Nakamura

发明人： Shoji Seta ,  Makoto Sekine ,  Naofumi Nakamura

IPC分类号： H01L21/4763

CPC分类号： H01L21/31116 ,  H01L21/76802 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76835 ,  H01L21/76838 ,  H01L21/76897 ,  H01L2221/1031 ,  H01L2924/30107

摘要： Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second wiring structure formed on the semiconductor substrate belonging to the wiring layer equal to the first wiring structure and including a second plug and a second wiring formed on the second plug, wherein the upper surface of the first wiring is positioned higher than the upper surface of the second wiring, and the lower surface of the first wiring is positioned flush with or lower than the upper surface of the second wiring. The present invention also provides a method of manufacturing the particular semiconductor device.

摘要翻译： 公开了一种半导体器件，包括形成在半导体衬底上的第一布线结构，包括形成在第一插头上的第一插头和第一布线，以及形成在属于布线层的半导体衬底上的第二布线结构， 布线结构，并且包括形成在第二插头上的第二插头和第二布线，其中第一布线的上表面定位成高于第二布线的上表面，并且第一布线的下表面与 低于第二布线的上表面。 本发明还提供了制造特定半导体器件的方法。

公开(公告)号：US06642149B2

公开(公告)日：2003-11-04

申请号：US10286789

申请日：2002-11-04

申请人： Tomoki Suemasa ,  Tsuyoshi Ono ,  Kouichiro Inazawa ,  Makoto Sekine ,  Itsuko Sakai ,  Yukimasa Yoshida

发明人： Tomoki Suemasa ,  Tsuyoshi Ono ,  Kouichiro Inazawa ,  Makoto Sekine ,  Itsuko Sakai ,  Yukimasa Yoshida

IPC分类号： H01L21302

CPC分类号： H01J37/32174 ,  H01J37/32091 ,  H01J37/32165

摘要： In a processing chamber of an etching apparatus a lower electrode and an upper electrode grounded through a processing container are disposed oppositely to each other. A first high frequency power supply section composed of a first filter, a first matching device, and a first power source, and a second high frequency power supply section composed of a second filter, a second matching device, and a second power source are connected to the lower electrode. A superimposed power of two frequencies composed of a first high frequency power component of at least 10 MHz produced from the first power source and a second high frequency power component of at least 2 MHz produced from the second power source is applied to the lower electrode. Ions in the plasma do not accelerated by changes of electric field in the processing chamber, but are accelerated by a self-bias voltage and collide only against a wafer on the lower electrode.

摘要翻译： 在蚀刻装置的处理室中，通过处理容器接地的下电极和上电极彼此相对设置。 由第一滤波器，第一匹配装置和第一电源组成的第一高频电源部分和由第二滤波器，第二匹配装置和第二电源组成的第二高频电源部分被连接 到下电极。 将由第一电源产生的至少10MHz的第一高频功率分量和由第二电源产生的至少2MHz的第二高频功率分量组成的两个频率的叠加功率施加到下部电极。 等离子体中的离子不会因处理室中的电场的变化而加速，而是通过自偏压加速并且仅与下电极上的晶片相撞。

公开(公告)号：US06605542B2

公开(公告)日：2003-08-12

申请号：US09995839

申请日：2001-11-29

申请人： Shoji Seta ,  Makoto Sekine ,  Naofumi Nakamura

发明人： Shoji Seta ,  Makoto Sekine ,  Naofumi Nakamura

IPC分类号： H01L21391

CPC分类号： H01L21/76829 ,  H01L21/31116 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76826 ,  H01L21/76835 ,  H01L21/76838 ,  H01L21/76897 ,  H01L2221/1031 ,  H01L2924/30107

摘要： There is provided a method of forming an interlayer insulating film having a dual-damascene structure, a contact hole and a deep trench mask using an organic silicon film. The shape of polysilane or the like is processed so that polysilane is used as an interlayer insulating film having a dual-damascene structure to control the shape and depth and prevent borderless etching which must be solved when a trench is formed. Polysilane and an insulating film are formed into a laminated structure so as to be integrated with each other after a dry etching step has been completed to easily form a contact hole having a high aspect ratio. The surface of polysilane is selectively formed into an insulating film so as to be used as a mask for use in a dry etching step. Polysilane for use as an anti-reflective film or an etching mask is changed to an oxide film or a nitride film so that films are easily removed. Hence it follows that a device region and a device isolation region of a densely integrated circuit can be smoothed, a self-aligned contact hole and metallization trench can be formed with a satisfactory manufacturing yield and the pattern of a gate electrode can be formed.

公开(公告)号：US06334928B1

公开(公告)日：2002-01-01

申请号：US09239793

申请日：1999-01-29

申请人： Makoto Sekine ,  Nobuo Hayasaka ,  Katsuya Okumura

发明人： Makoto Sekine ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： B01D800

CPC分类号： B01D53/06 ,  B01D8/00 ,  B01D53/0462 ,  B01D2257/2066 ,  B01D2258/0216 ,  B01D2259/40056 ,  B01D2259/40088 ,  B01D2259/402 ,  C23C16/4412 ,  Y02C20/30 ,  Y02P70/34 ,  Y02P70/605

摘要： A semiconductor wafer etching system exhausts an exhaust gas including fluorocarbon gas to an exhaust line. Two traps, that are capable of trapping the fluorocarbon gas in the exhaust gas by cooled adsorption and releasing the adsorbed fluorocarbon gas by heating, are alternately arranged on the exhaust line. The two traps are alternately separated from the exhaust gas and regenerated on a regeneration line which serves to release the adsorbed fluorocarbon gas from the traps. The trap which is in the trap mode to adsorb the fluorocarbon gas is cooled to −120° C. or less. The trap which is in the regeneration mode to release the adsorbed fluorocarbon gas is heated to −100° C. or more.

摘要翻译： 半导体晶片蚀刻系统将包括碳氟化合物气体的废气排出到排气管线。 能够通过冷却吸附捕集排气中的碳氟化合物气体并且通过加热而释放吸附的碳氟化合物气体的两个捕集阱交替排列在排气管线上。 两个捕集阱与废气交替分离，并在用于从捕集器中释放吸附的碳氟化合物气体的再生管线上再生。 陷阱模式中吸附碳氟化合物气体的阱被冷却至-120℃或更低。 处于再生模式以释放吸附的碳氟化合物气体的捕集器被加热到​​-100℃或更高。

公开(公告)号：US5950083A

公开(公告)日：1999-09-07

申请号：US533162

申请日：1995-09-25

申请人： Ken Inoue ,  Makoto Sekine

发明人： Ken Inoue ,  Makoto Sekine

IPC分类号： C23C16/50 ,  C23C16/511 ,  H01L21/28 ,  H01L21/285 ,  H01L21/8238 ,  H01L27/092

CPC分类号： H01L21/823835

摘要： A method for fabricating a CMOS transistor having a salicide structure is disclosed. A naturally formed oxide film covering surfaces of polycrystalline silicon film patterns, a P-type diffusion layer and an N-type diffusion layer is removed. Then, by introducing at least a titanium tetrachloride gas and a hydrogen gas into an electron cyclotron resonance plasma excited chemical vapor deposition system using microwaves (or into a plasma excited chemical vapor deposition system using helicon waves), titanium/silicide films are selectively formed on surfaces of the polycrystalline silicon film patterns and the P-type diffusion layer and the N-type diffusion layer. The crystal structure of the titanium/silicide films is of a C54 structure. During the formation of the titanium/silicide film, it is possible to suppress the occurrence of bridging and condensation phenomena.

摘要翻译： 公开了一种制造具有硅化物结构的CMOS晶体管的方法。 去除覆盖多晶硅膜图案，P型扩散层和N型扩散层的表面的自然形成的氧化物膜。 然后，通过将至少四氯化钛气体和氢气引入到使用微波的电子回旋共振等离子体激发化学气相沉积系统（或者使用螺旋形波等离子体激发的化学气相沉积系统）中，钛/硅化物膜选择性地形成在 多晶硅膜图案和P型扩散层和N型扩散层的表面。 钛/硅化物膜的晶体结构为C54结构。 在形成钛/硅化物膜时，可以抑制桥接和凝结现象的发生。

公开(公告)号：US5385763A

公开(公告)日：1995-01-31

申请号：US203757

申请日：1994-03-01

申请人： Haruo Okano ,  Sadahisa Noguchi ,  Makoto Sekine

发明人： Haruo Okano ,  Sadahisa Noguchi ,  Makoto Sekine

IPC分类号： C23C16/04 ,  C23C16/40 ,  C23C16/44 ,  C23C16/46 ,  H01L21/205 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  B05D3/06

CPC分类号： H01L21/02274 ,  C23C16/045 ,  C23C16/402 ,  C23C16/44 ,  C23C16/46 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02277 ,  H01L21/02337 ,  H01L21/31604 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76879 ,  Y10S148/05

摘要： A thin film forming method comprises the steps of supporting a semiconductor substrate having a trench or an unevenness thereon in a reaction vessel; introducing a reactive gas into the vessel; activating the reactive gas to form a deposit species, the deposit species characterized by a phase diagram including a liquid phase region defined by a melting curve and an evaporation curve that intersect at a triple point; and forming a thin film containing at least part of the deposit species on the substrate while retaining a pressure in the vessel higher than the triple point of the phase diagram of the deposit species, and retaining a temperature of the substrate within the liquid phase region of the phase diagram of the deposit species.

摘要翻译： 薄膜形成方法包括以下步骤：在反应容器中支撑具有沟槽或凹凸的半导体衬底; 将反应性气体引入容器中; 激活反应气体以形成沉积物，所述沉积物质的特征在于包括由三维点相交的熔解曲线和蒸发曲线限定的液相区域的相图; 以及在所述衬底上形成含有至少部分沉积物的薄膜，同时保持在所述容器中的压力高于所述沉积物种的相图的三重点，并且将所述衬底的温度保持在 沉积物种的相图。

公开(公告)号：US4838978A

公开(公告)日：1989-06-13

申请号：US123353

申请日：1987-11-20

申请人： Makoto Sekine ,  Haruo Okano ,  Tsunetoshi Arikado ,  Yasuhiro Horiike

发明人： Makoto Sekine ,  Haruo Okano ,  Tsunetoshi Arikado ,  Yasuhiro Horiike

IPC分类号： H01L21/302 ,  H01J37/32 ,  H01L21/00 ,  H01L21/3065

CPC分类号： H01L21/67069 ,  H01J37/32431

摘要： A dry etching apparatus which includes an anode located at an upper side and a cathode located at a lower side which face each other in a vacuum vessel. A high-frequency power can be applied across the anode and the cathode. A flange section extends from the inner wall of the vacuum vessel, and is located between the anode and the cathode. A semiconductor wafer can be placed on the cathode through a tray. The cathode is moved toward the anode together with the tray and the wafer. When the edge portion of the tray abuts against the flange section, the interior of the vacuum vessel is partitioned into an etching chamber and the other chamber. A magnetic field is applied to the etching chamber from outside the vacuum vessel, and an etching gas is also introduced into the etching chamber. When the etching gas is introduced, the interior of the etching chamber is evacuated to be maintained at a predetermined pressure.

摘要翻译： 一种干蚀刻装置，其包括位于上侧的阳极和位于真空容器中彼此面对的下侧的阴极。 可以在阳极和阴极之间施加高频功率。 凸缘部分从真空容器的内壁延伸，并位于阳极和阴极之间。 可以通过托盘将半导体晶片放置在阴极上。 阴极与托盘和晶片一起向阳极移动。 当托盘的边缘部分抵靠凸缘部分时，真空容器的内部被分隔成蚀刻室和另一个室。 从真空容器的外部向蚀刻室施加磁场，蚀刻气体也被引入蚀刻室。 当蚀刻气体被引入时，蚀刻室的内部被抽真空以保持在预定的压力。

公开(公告)号：US4786361A

公开(公告)日：1988-11-22

申请号：US22368

申请日：1987-03-05

申请人： Makoto Sekine ,  Haruo Okano ,  Yasuhiro Horiike

发明人： Makoto Sekine ,  Haruo Okano ,  Yasuhiro Horiike

IPC分类号： H01J37/32 ,  H01L21/308 ,  B44C1/22

CPC分类号： H01J37/32623 ,  H01J37/3266 ,  H01L21/3085

摘要： A process is disclosed which etches a workpiece, with an etching mask of a predetermined pattern formed on the surface of the workpiece, on an apparatus which includes a container for holding first and second electrodes opposite to each other and a magnetic field generator arranged on a side opposite to that side of the second electrode where the second electrode faces the first electrode, which comprises placing the workpiece on the first electrode, supplying a feed gas into the container, evacuating air in the container to set pressure in the container at a level of 10.sup.-2 torrs, and applying high frequency power across the first and second electrodes to yield plasma whereby the workpiece is etched.

摘要翻译： 公开了一种工艺，在工件的表面上刻蚀具有预定图案的蚀刻掩模的工件，该设备包括用于保持彼此相对的第一和第二电极的容器和布置在工件上的磁场发生器 所述第二电极与所述第二电极的面对所述第一电极的所述一侧相反，所述第二电极包括将所述工件放置在所述第一电极上，将进料气体供应到所述容器中，抽空所述容器中的空气以将所述容器中的压力设定在一定水平 为10-2托，并且通过第一和第二电极施加高频电力以产生等离子体，从而蚀刻工件。

公开(公告)号：US4642171A

公开(公告)日：1987-02-10

申请号：US756318

申请日：1985-07-18

申请人： Makoto Sekine ,  Haruo Okano ,  Yasuhiro Horiike

发明人： Makoto Sekine ,  Haruo Okano ,  Yasuhiro Horiike

IPC分类号： H01L21/205 ,  B01J19/12 ,  C23C16/48 ,  C23F1/12 ,  C23F4/00 ,  G03F7/004 ,  H01L21/302 ,  H01L21/31 ,  C23C15/00

CPC分类号： C23C16/483 ,  B01J19/12 ,  C23F4/00 ,  G03F7/0041

摘要： A phototreating apparatus has a vacuum container for storing a solid material, a gas inlet for introducing a photoreactive gas into the container, and a light source for radiating into the container, light having a specific wavelength such that it causes a photoreaction of the photoreactive gas. The apparatus phototreats the solid material in the container by utilizing the photoreaction of the photoreactive gas. At least an inner surface of the vacuum container consists of a material which absorbs the light having the specific wavelength.

摘要翻译： 光固化装置具有用于储存固体材料的真空容器，用于将光反应性气体引入容器的气体入口和用于辐射到容器中的光源，具有特定波长的光，使得其引起光反应气体的光反应 。 该设备通过利用光反应性气体的光反应来对容器中的固体材料进行照射。 至少真空容器的内表面由吸收特定波长的光的材料构成。