公开(公告)号：US20210313299A1

公开(公告)日：2021-10-07

申请号：US17208198

申请日：2021-03-22

Applicant: MEDIATEK INC.

Inventor： Yi-Lin TSAI ,  Wen-Sung HSU ,  I-Hsuan PENG ,  Yi-Jou LIN

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor component, a conductive pillar, and a second semiconductor component. The redistribution layer is over the substrate. The first semiconductor component is over the redistribution layer. The conductive pillar is adjacent to the first semiconductor component, wherein the first semiconductor component and the conductive pillar are surrounded by a molding material. The second semiconductor component is over the molding material, wherein the second semiconductor component is electrically coupled to the redistribution layer through the conductive pillar.

公开(公告)号：US20180233474A1

公开(公告)日：2018-08-16

申请号：US15881063

申请日：2018-01-26

Applicant: MEDIATEK INC.

Inventor： Ta-Jen YU ,  Chi-Yuan CHEN ,  Wen-Sung HSU

IPC: H01L23/00

Abstract: The invention provides a semiconductor package. The semiconductor package includes a semiconductor die and a conductive pillar bump structure and a conductive plug. The semiconductor die has a die pad thereon. The conductive pillar bump structure is positioned overlying the die pad. The conductive pillar bump structure includes an under bump metallurgy (UBM) stack having a first diameter and a conductive plug on the UBM stack. The conductive plug has a second diameter that is different than the first diameter.

公开(公告)号：US20170186709A1

公开(公告)日：2017-06-29

申请号：US15455200

申请日：2017-03-10

Applicant: MediaTek Inc.

Inventor： Wen-Sung HSU ,  Ta-Jen YU

IPC: H01L23/64 ,  H01L23/498 ,  H05K3/00 ,  H01L21/48 ,  H05K3/32 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L23/49827 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/5384 ,  H01L2224/16227 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/205 ,  H01L2924/00012 ,  H01L2924/0001

Abstract: A manufacturing method of a package substrate is provided. The method includes forming a first circuit layer on a carrier. A passive component is disposed on the first circuit layer and the carrier. A dielectric layer is formed on the carrier to embed the passive component and the first circuit layer in the dielectric layer. A second circuit layer is formed on the dielectric layer. The carrier is removed from the dielectric layer. A manufacturing method of a chip package is also provided.

公开(公告)号：US20150262840A1

公开(公告)日：2015-09-17

申请号：US14663772

申请日：2015-03-20

Applicant: MediaTek Inc

Inventor： Wen-Sung HSU ,  Ta-Jen YU

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L21/485 ,  H01F17/00 ,  H01F17/0006 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/705 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/17 ,  H01L25/50 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2924/12042 ,  H01L2924/1206 ,  H01L2924/1421 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/2064 ,  H05K1/165 ,  H05K1/181 ,  H05K1/183 ,  H05K3/0017 ,  H05K3/0026 ,  H05K3/0047 ,  H05K3/107 ,  H05K3/188 ,  H05K3/303 ,  H05K2201/10098 ,  H01L2924/00

Abstract: A method for fabricating a base for a semiconductor package is provided. The method operates by providing a carrier with conductive seed layers on the top surface and the bottom surface of the carrier, forming radio-frequency (RF) devices respectively on the conductive seed layers, laminating a first base material layer and a second base material layer respectively on the conductive seed layers, covering the RF devices, and separating the first base material layer the second base material layer, which contain the RF devices thereon, from the carrier to form a first base and a second base.

Abstract translation: 提供了一种制造用于半导体封装的基座的方法。 该方法通过在载体的顶表面和底表面上提供具有导电种子层的载体来工作，分别在导电种子层上形成射频（RF）装置，层压第一基材层和第二基材层 分别在导电种子层上覆盖RF器件，以及将第一基底层与载体上包含RF器件的第二基底层分离，形成第一基底和第二基底。

公开(公告)号：US20140151867A1

公开(公告)日：2014-06-05

申请号：US14173976

申请日：2014-02-06

Applicant: MediaTek Inc.

Inventor： Tzu-Hung LIN ,  Wen-Sung HSU ,  Ta-Jen YU ,  Andrew C. CHANG

IPC: H01L23/495

Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.

Abstract translation: 本发明提供半导体封装和用于制造用于半导体封装的基座的方法。 半导体封装包括嵌入基座中的导电迹线。 半导体器件通过导电结构安装在导电迹线上。

公开(公告)号：US20130313698A1

公开(公告)日：2013-11-28

申请号：US13896616

申请日：2013-05-17

Applicant: MediaTek Inc.

Inventor： Tai-Yu CHEN ,  Chung-Fa LEE ,  Wen-Sung HSU ,  Shih-Chin LIN

IPC: H01L23/36

CPC classification number: H01L23/3736 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上，具有第一横截面尺寸; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在电路板上的密封剂层，覆盖半导体芯片并围绕间隔物; 形成在密封剂层和间隔物上的散热层; 以及形成在电路板的第二表面上的多个焊球。

公开(公告)号：US20200381365A1

公开(公告)日：2020-12-03

申请号：US16994764

申请日：2020-08-17

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung HSU ,  Tao CHENG ,  Nan-Cheng CHEN ,  Che-Ya CHOU ,  Wen-Chou WU ,  Yen-Ju LU ,  Chih-Ming HUNG ,  Wei-Hsiu HSU

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L23/31 ,  H01L25/065 ,  H01L25/16 ,  H01L23/50 ,  H01L23/498 ,  H01L21/683 ,  H01Q9/04 ,  H01L23/66 ,  H01Q1/22

Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US20190019763A1

公开(公告)日：2019-01-17

申请号：US16007032

申请日：2018-06-13

Applicant: MEDIATEK INC.

Inventor： Hung-Jen CHANG ,  Jen-Chuan CHEN ,  Hsueh-Te WANG ,  Wen-Sung HSU

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/367 ,  H01L21/56 ,  H01L21/3205 ,  H01L23/00

Abstract: A semiconductor package structure including an encapsulating layer, a package substrate, and a conductive shielding layer is provided. The package substrate has a device region covered by the encapsulating layer and an edge region surrounding the device region and exposed from the encapsulating layer. The package substrate includes an insulating layer and a patterned conductive layer in a level of the insulating layer. The patterned conductive layer includes conductors in and along the edge region. The edge region is partially exposed from the conductors, as viewed from a top-view perspective. The conductive shielding layer covers and surrounds the encapsulating layer and is electrically connected to the conductors.

公开(公告)号：US20180233425A1

公开(公告)日：2018-08-16

申请号：US15881030

申请日：2018-01-26

Applicant: MEDIATEK INC.

Inventor： Ta-Jen YU ,  Wen-Sung HSU

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/683

CPC classification number: H01L23/3114 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/562 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/02372 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121

Abstract: The invention provides a semiconductor package and a method for fabricating the same. The semiconductor package includes a redistribution layer (RDL) structure, a semiconductor die, a molding compound and a supporter. The RDL structure has a first surface and a second surface opposite to the first surface. The semiconductor die is disposed on the first surface of the RDL structure and electrically coupled to the RDL structure. The molding compound is positioned overlying the semiconductor die and the first surface of the RDL structure. The supporter is positioned beside the semiconductor die and in contact with the first surface of the RDL structure.

公开(公告)号：US20180082936A1

公开(公告)日：2018-03-22

申请号：US15700220

申请日：2017-09-11

Applicant: MEDIATEK INC.

Inventor： Shih-Yi SYU ,  Chia-Yu JIN ,  Che-Ya CHOU ,  Wen-Sung HSU ,  Nan-Cheng CHEN

IPC: H01L23/498 ,  H01L23/42 ,  H01L23/64 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/164 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.