公开(公告)号：US5445550A

公开(公告)日：1995-08-29

申请号：US173739

申请日：1993-12-22

Applicant: Chenggang Xie ,  Nalin Kumar

Inventor： Chenggang Xie ,  Nalin Kumar

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02

CPC classification number: H01J1/3042 ,  H01J3/022 ,  H01J2329/00

Abstract: Lateral luminescent field emitter devices for use in flat panel displays and a method of manufacturing are described. The device comprises a flat substrate, an anode disposed on the substrate, and a cathode disposed on the substrate, the cathode providing an electron emission surface capable of emitting electrons laterally across a gap to a major portion of an adjacent surface of the anode.

Abstract translation: 描述了用于平板显示器的侧面发光场发射器件和制造方法。 该器件包括平坦的衬底，设置在衬底上的阳极和设置在衬底上的阴极，阴极提供能够横向跨过阳极的相邻表面的主要部分的间隙发射电子的电子发射表面。

公开(公告)号：US5331172A

公开(公告)日：1994-07-19

申请号：US128975

申请日：1993-09-29

Applicant: Nalin Kumar ,  Chenggang Xie ,  Rama R. Goruganthu ,  Mohammed K. Ghazi

Inventor： Nalin Kumar ,  Chenggang Xie ,  Rama R. Goruganthu ,  Mohammed K. Ghazi

IPC: H01L21/60 ,  H01L23/485 ,  H05K3/00 ,  H01J37/30

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01J2201/30457 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H05K2201/2081 ,  H05K2203/0554 ,  H05K2203/107 ,  H05K3/0023 ,  H05K3/0041

Abstract: Ionized metal cluster beam deposition of metal bumps on substrates such as multi-chip modules and integrated circuit chips is enhanced. The present invention discloses wet etching techniques for removing unwanted metal deposited on the substrate around bumps, multiple sources for depositing alloyed (tin-lead) bumps with constant composition, and single or multiple sources for directing a cluster beam through an aperture to deposit metal on a substrate and directing an ion beam at the aperture to remove metal deposited therein.

Abstract translation: 提高了诸如多芯片模块和集成电路芯片的衬底上的金属凸块的电离金属簇束沉积。 本发明公开了用于去除沉积在凸起周围的衬底上的不需要的金属的湿蚀刻技术，用于沉积具有恒定组成的合金化（锡 - 铅）凸块的多个源以及用于引导聚束束穿过孔以将金属沉积在其上的单个或多个源 一个衬底，并将一个离子束引导到该孔处以除去沉积在其中的金属。

公开(公告)号：US5312514A

公开(公告)日：1994-05-17

申请号：US52958

申请日：1993-04-23

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H01J9/02 ,  H05K3/00 ,  H01J9/00

CPC classification number: H01J9/025 ,  H01J2201/30407 ,  H01J2201/30457 ,  H05K2201/2081 ,  H05K2203/0554 ,  H05K2203/107 ,  H05K3/0023 ,  H05K3/0041

Abstract: Method of making a field emitter device with submicron low work function emission tips without using photolithography. The method includes depositing in situ by evaporating or sputtering a discontinuous etch mask comprising randomly located discrete nuclei. In one embodiment an ion etch is applied to a low work function material covered by a discontinuous mask to form valleys in the low work function material with pyramid shaped emission tips therebetween. In another embodiment an ion etch is applied to an electrically conductive base material covered by a discontinuous mask to form valleys in the base material with pyramid shaped base tips therebetween. The base material is then coated with a low work function material to form emission tips thereon.

Abstract translation: 制造具有亚微米低功函数发射尖端而不使用光刻的场发射极器件的方法。 该方法包括通过蒸发或溅射包含随机定位的离散核的不连续蚀刻掩模来原位沉积。 在一个实施例中，离子蚀刻被施加到由不连续掩模覆盖的低功函数材料，以在其中具有金字塔形发射尖端的低功函数材料中形成谷。 在另一个实施例中，离子蚀刻被施加到由不连续掩模覆盖的导电基底材料，以在基底材料中形成具有金字塔形基底尖端的谷部。 然后用低功函数材料涂覆基材以在其上形成发射末端。

公开(公告)号：US5227013A

公开(公告)日：1993-07-13

申请号：US735572

申请日：1991-07-25

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H01L21/48 ,  H05K1/00 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K3/0035 ,  H01L21/486 ,  H05K1/0393 ,  H05K2201/0166 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/09845 ,  H05K2203/0554 ,  H05K2203/1338 ,  H05K3/002 ,  H05K3/0041 ,  H05K3/4076 ,  Y10T29/49155

Abstract: A method for forming via holes in a multilayer structure in a single step. The invention includes disposing over a base a first layer comprising first metal lines beneath a first dielectric, disposing over the first layer a second layer comprising second metal lines beneath a second dielectric such that a portion of each first metal line is not beneath any second metal line, and forming via holes which extend through the second dielectric to the second metal lines and through the second dielectric and the first dielectric to the portions of the first metal lines. Thereafter conductive metal can be deposited in the via holes. The method is particularly well suited for fabricating copper/polymer substrates.

Abstract translation: 一种在一个步骤中在多层结构中形成通孔的方法。 本发明包括在基底上设置包括在第一电介质下方的第一金属线的第一层，在第一层上设置第二层，第二层包括第二电介质下面的第二金属线，使得每个第一金属线的一部分不在任何第二金属之下 并且形成通过第二电介质延伸到第二金属线并且通过第二电介质和第一电介质延伸到第一金属线的部分的通孔。 此后，导电金属可以沉积在通孔中。 该方法特别适用于制造铜/聚合物基材。

公开(公告)号：US5120572A

公开(公告)日：1992-06-09

申请号：US605806

申请日：1990-10-30

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H05K1/16 ,  H05K3/06 ,  H05K3/46

CPC classification number: H05K1/16 ,  H05K1/162 ,  H05K1/167 ,  H05K2201/0317 ,  H05K2201/09563 ,  H05K2203/0315 ,  H05K2203/1142 ,  H05K3/061 ,  H05K3/4647 ,  Y10S148/014 ,  Y10S148/136

Abstract: A process for fabricating integrated resistors in high density interconnect substrates for multi-chip modules. In addition, the resistor material can be connected selectively into an insulator for optionally allowing for the simultaneous fabrication of integrated resistors and capacitors in relatively few steps. The process is well suited for cooper/polyimide substrates.

Abstract translation: 一种用于制造用于多芯片模块的高密度互连基板中的集成电阻器的方法。 此外，电阻材料可以选择性地连接到绝缘体中，以可选地允许在相对较少的步骤中同时制造集成电阻器和电容器。 该工艺非常适用于铜/聚酰亚胺基板。

公开(公告)号：US20050016575A1

公开(公告)日：2005-01-27

申请号：US10866429

申请日：2004-06-12

Applicant: Nalin Kumar ,  Paul Cutler ,  Nicholas Miskovsky ,  Moon Chung

Inventor： Nalin Kumar ,  Paul Cutler ,  Nicholas Miskovsky ,  Moon Chung

IPC: H01L35/00 ,  H01L35/30

CPC classification number: H01L35/00

Abstract: This invention describes novel architectures for enhancing the efficiency of thermoelectric devices by incorporating high thermal resistivity and high electrical conductivity sections based on field emission devices. The uses of such devices include coolers and electricity generators.

Abstract translation: 本发明描述了通过结合基于场发射器件的高热电阻率和高电导率部分来提高热电器件的效率的新型结构。 这种装置的用途包括冷却器和发电机。

公开(公告)号：US06573643B1

公开(公告)日：2003-06-03

申请号：US09677361

申请日：2000-10-02

Applicant: Nalin Kumar ,  Chenggang Xie

Inventor： Nalin Kumar ,  Chenggang Xie

IPC: H01J130

CPC classification number: H01J1/3042 ,  H01J1/304 ,  H01J1/316 ,  H01J9/027 ,  H01J31/127 ,  H01J61/0677 ,  H01J63/06 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/3165

Abstract: A field emission cathode for use in flat panel displays is described including a layer of conductive material and a layer of amorphic diamond film, functioning as a low effective work-function material, deposited over the conductive material to form emission sites. The emission sites each contain at least two sub-regions having differing electron affinities. Use of the cathode to form a computer screen is also described along with the use of the cathode to form a fluorescent light source.

Abstract translation: 描述了用于平板显示器的场发射阴极，其包括沉积在导电材料上以形成发射位点的导电材料层和用作低有效功函数材料的非晶金刚石膜层。 发射部位各自含有至少两个具有不同电子亲和力的亚区域。 还描述了使用阴极形成计算机屏幕，同时使用阴极来形成荧光光源。

公开(公告)号：US06303143B1

公开(公告)日：2001-10-16

申请号：US09095616

申请日：1998-06-10

Applicant: Suggy S. Chrai ,  Ramaswamy Murari ,  Eugene Samuel Poliniak ,  Hoi Cheong (Steve) Sun ,  Nitin Vithalbhai Desai ,  Dominic Stephen Rosati ,  Nalin Kumar ,  William Ronald Roach ,  Lawrence Harrison Hammer ,  Peter David Southgate ,  Bawa Singh ,  Howard Christopher Rivenburg ,  David Keller ,  Peter John Zanzucchi ,  Aaron William Levine ,  Prince Lal

Inventor： Suggy S. Chrai ,  Ramaswamy Murari ,  Eugene Samuel Poliniak ,  Hoi Cheong (Steve) Sun ,  Nitin Vithalbhai Desai ,  Dominic Stephen Rosati ,  Nalin Kumar ,  William Ronald Roach ,  Lawrence Harrison Hammer ,  Peter David Southgate ,  Bawa Singh ,  Howard Christopher Rivenburg ,  David Keller ,  Peter John Zanzucchi ,  Aaron William Levine ,  Prince Lal

IPC: A61K948

CPC classification number: A61J3/00 ,  A61J1/035 ,  A61K9/70 ,  B05B5/08 ,  B65B1/04 ,  B65B1/30 ,  B65B11/50 ,  G01N33/521

Abstract: A substrate is roboticaly picked up at a station and transported to a measuring station to measure the distance to a reference. The substrate is aligned to a robot before measurement. The measured substrate is then transported to a pharmaceutical or diagnostic powder/grain deposition station where the powder/grains are controllably deposited on the substrate to predetermined thicknesses over a plurality of powder/grain collection zones. The deposited powder/grains are then measured to determine the thickness and area covered by the deposited powder/grains at each collection zone. The substrate is then transported to a lamination station and each collection zone of powder/grains is welded to a cover substrate. The system remembers which collection zones are out of specification so that they can be later selectively discarded.

Abstract translation: 机器人被机器人拾取并运送到测量站以测量到参考的距离。 在测量之前，将基板与机器人对准。 然后将测量的基底输送到药物或诊断粉末/颗粒沉积站，其中粉末/颗粒可控地沉积在基底上至多个粉末/颗粒收集区域上的预定厚度。 然后测量沉积的粉末/颗粒以确定在每个收集区域沉积的粉末/颗粒覆盖的厚度和面积。 然后将基板输送到层压站，并将粉末/颗粒的每个收集区域焊接到覆盖基板。 系统会记住哪些收集区域超出规范，以便随后可以选择性地丢弃它们。

公开(公告)号：US6008595A

公开(公告)日：1999-12-28

申请号：US845129

申请日：1997-04-21

Applicant: Richard Lee Fink ,  Nalin Kumar ,  Donald Miller Wilson

Inventor： Richard Lee Fink ,  Nalin Kumar ,  Donald Miller Wilson

IPC: G09G3/22 ,  G05F1/00

CPC classification number: G09G3/22

Abstract: A field emission lamp, of either a diode or triode structure has a packaging whereby electrical access to the various electrodes of the lamp is provided through the rear or underside of the field emission device so that the individual lamps can be placed in close proximity to each other.

公开(公告)号：US5763997A

公开(公告)日：1998-06-09

申请号：US456453

申请日：1995-06-01

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H01J1/304 ,  H01J1/316 ,  H01J9/02 ,  H01J31/12 ,  H01J61/067 ,  H01J63/06 ,  H01J19/24

CPC classification number: H01J1/3042 ,  H01J1/304 ,  H01J1/316 ,  H01J31/127 ,  H01J61/0677 ,  H01J63/06 ,  H01J9/027 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/3165 ,  H01J2201/319 ,  H01J2329/00 ,  H01J2329/8625

Abstract: A matrix addressable flat panel display includes a flat cathode operable for emitting electrons to an anode when an electric field is produced across the surface of the flat cathode by two electrodes placed on each side of the flat cathode. The flat cathode may consist of a cermet or amorphic diamond or some other combination of a conducting material and an insulating material such as a low effective work function material. The electric field produced causes electrons to hop on the surface of the cathode at the conducting-insulating interfaces. An electric field produced between the anode and the cathode causes these electrons to bombard a phosphor layer on the anode.

Abstract translation: 矩阵寻址平板显示器包括平面阴极，当通过放置在平面阴极的每一侧上的两个电极跨越平面阴极的表面产生电场时，可以将电子发射到阳极。 扁平阴极可以由金属陶瓷或非晶金刚石或导电材料和绝缘材料的一些其它组合构成，例如低有效功函数材料。 所产生的电场导致电子在导电绝缘界面处在阴极的表面上跳跃。 在阳极和阴极之间产生的电场使得这些电子轰击阳极上的磷光体层。