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公开(公告)号:US10332671B2
公开(公告)日:2019-06-25
申请号:US15345312
申请日:2016-11-07
Applicant: QUALCOMM Incorporated
Inventor: Mario Francisco Velez , Niranjan Sunil Mudakatte , Changhan Hobie Yun , Daeik Daniel Kim , David Francis Berdy , Jonghae Kim , Yunfei Ma , Chengjie Zuo
IPC: H04B5/00 , H01F27/02 , H01F27/28 , H01L23/31 , H01L23/00 , H01L21/56 , H01F27/29 , H01F41/06 , H01F38/14 , H01L23/522 , H01L23/64 , H01L25/16 , H01L49/02
Abstract: An inductor with multiple loops and semiconductor devices with such an inductor integrated thereon are proposed. In an aspect, the semiconductor device may include a die on a substrate, an inductor on the die in which the inductor comprises a wire with multiple non-planar loops above the die. In another aspect, the semiconductor device may include a plurality of posts on a die on a substrate, and an inductor on the die. The inductor may include a wire looped around the plurality of posts such that the inductor includes multiple non-planar loops.
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公开(公告)号:US10283257B2
公开(公告)日:2019-05-07
申请号:US14991803
申请日:2016-01-08
Applicant: QUALCOMM Incorporated
Inventor: Daeik Daniel Kim , David Francis Berdy , Chengjie Zuo , Changhan Hobie Yun , Jonghae Kim
Abstract: A skewed, co-spiral inductor structure may include a first trace arranged in a first spiral pattern that is supported by a substrate. The skewed, co-spiral inductor structure may also include a second trace arranged in a second spiral pattern, in which the second trace is coupled to the first trace. The first trace may overlap with the second trace in orthogonal overlap areas. In addition, each orthogonal overlap area may have a size defined by a width of the first trace and the width of the second trace. Also, parallel edges of the first trace and the second trace may be arranged to coincide.
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公开(公告)号:US10171112B2
公开(公告)日:2019-01-01
申请号:US15080472
申请日:2016-03-24
Applicant: QUALCOMM Incorporated
Inventor: Yunfei Ma , Chengjie Zuo , David Berdy , Daeik Kim , Changhan Yun , Je-Hsiung Lan , Mario Velez , Niranjan Sunil Mudakatte , Robert Mikulka , Jonghae Kim
IPC: H01P5/18 , H04B1/00 , H04B1/04 , H04B1/3827 , H04B1/40 , H04L5/14 , H03H7/09 , H03H7/46 , H01P5/02
Abstract: An RF diplexer is provided that includes a first channel and a second channel. The first channel includes a first primary inductor. Similarly, the second channel includes a second primary inductor. A first directional coupler for the first channel includes a first transformer formed by the first primary inductor and also a first secondary inductor. A first terminal for the first secondary inductor is a coupled port for the first directional coupler. A second directional coupler for the second channel includes a second transformer formed by the second primary inductor and also a second secondary inductor. A first terminal for the second secondary inductor is a coupled port for the second directional coupler.
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公开(公告)号:US10103116B2
公开(公告)日:2018-10-16
申请号:US15077869
申请日:2016-03-22
Applicant: QUALCOMM Incorporated
Inventor: Daeik Daniel Kim , Mario Francisco Velez , Changhan Hobie Yun , Chengjie Zuo , David Francis Berdy , Jonghae Kim , Niranjan Sunil Mudakatte
Abstract: A conductive bump assembly may include a passive substrate. The conductive bump assembly may also include a conductive bump pad supported by the passive substrate and surrounded by a first passivation layer opening. The conductive bump assembly may further include a second passivation layer opening on the passive substrate. The second passivation layer opening may be merged with the first passivation layer opening surrounding the conductive bump pad proximate an edge of the passive substrate. The conductive bump assembly may also include a conductive bump on the conductive bump pad.
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25.
公开(公告)号:US09959964B2
公开(公告)日:2018-05-01
申请号:US14941493
申请日:2015-11-13
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , David Francis Berdy , Daeik Daniel Kim , Chengjie Zuo , Jonghae Kim , Je-Hsiung Jeffrey Lan , Mario Francisco Velez , Niranjan Sunil Mudakatte
CPC classification number: H01F10/12 , H01F17/0013 , H01F27/2804 , H01F41/042 , H01F41/046 , H01F2017/0066 , H01F2027/2809
Abstract: A thin film magnet (TFM) three-dimensional (3D) inductor structure may include a substrate with conductive vias extending through the substrate. The TFM 3D inductor structure may also include a magnetic thin film layer on at least sidewalls of the conductive vias and on a first side and an opposing second side of the substrate. The TFM 3D inductor structure may further include a first conductive trace directly on the magnetic thin film layer on the first side of the substrate and electrically coupling to at least one of the conductive vias. The TFM 3D inductor structure also includes a second conductive trace directly on the magnetic thin film layer on the second side of the substrate and coupled to at least one of the conductive vias.
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26.
公开(公告)号:US09954267B2
公开(公告)日:2018-04-24
申请号:US15067106
申请日:2016-03-10
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , Daeik Daniel Kim , Mario Francisco Velez , Chengjie Zuo , David Francis Berdy , Jonghae Kim
CPC classification number: H01P5/16 , H01Q1/22 , H01Q1/50 , H03H7/0115 , H03H7/463
Abstract: A multiplexer structure includes a passive substrate. The multiplexer structure may also include a high band filter on the passive substrate. The high band filter may include a 2D planar spiral inductor(s) on the passive substrate. The multiplexer structure may further include a low band filter on the passive substrate. The low band filter may include a 3D through-substrate inductor and a first capacitor(s) on the passive substrate. The multiplexer structure may also include a through substrate via(s) coupling the high band filter and the low band filter.
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公开(公告)号:US09893048B2
公开(公告)日:2018-02-13
申请号:US14853701
申请日:2015-09-14
Applicant: QUALCOMM Incorporated
Inventor: Je-Hsiung Jeffrey Lan , Niranjan Sunil Mudakatte , Changhan Hobie Yun , Daeik Daniel Kim , Chengjie Zuo , David Francis Berdy , Mario Francisco Velez , Jonghae Kim
IPC: H01L27/12 , H01L27/01 , H01L49/02 , H01L23/522 , H01L23/15 , H01L21/48 , H01L21/70 , H01L23/498
CPC classification number: H01L27/01 , H01L21/4846 , H01L23/15 , H01L23/49816 , H01L23/49822 , H01L23/5223 , H01L23/5227 , H01L28/10 , H01L28/75 , H01L2224/11
Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.
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公开(公告)号:US20170338034A1
公开(公告)日:2017-11-23
申请号:US15160776
申请日:2016-05-20
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie Yun , Chengjie Zuo , Daeik Daniel Kim , Mario Francisco Velez , Niranjan Sunil Mudakatte , Jonghae Kim , David Francis Berdy
CPC classification number: H01F27/40 , H01F17/00 , H01F27/2823 , H01F27/29 , H01F27/292 , H01F41/02 , H01F2017/002 , H01L23/49822 , H01L23/5223 , H01L23/5227 , H01L28/10 , H03H7/0115 , H03H7/466
Abstract: An apparatus includes a substrate and a three-dimensional (3D) wirewound inductor integrated within the substrate. The apparatus further includes a capacitor coupled to the 3D wirewound inductor.
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公开(公告)号:US09813043B2
公开(公告)日:2017-11-07
申请号:US15079789
申请日:2016-03-24
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Zuo , Daeik D. Kim , Je-Hsiung Lan , Jonghae Kim , Mario Francisco Velez , Changhan Yun , David F. Berdy , Robert P. Mikulka , Matthew M. Nowak , Xiangdong Zhang , Puay H. See
CPC classification number: H03H7/461 , H03H3/00 , H03H7/0115 , H03H7/463 , Y10T29/49016
Abstract: Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used.
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公开(公告)号:US09807882B1
公开(公告)日:2017-10-31
申请号:US15239751
申请日:2016-08-17
Applicant: QUALCOMM Incorporated
Inventor: David Francis Berdy , Changhan Hobie Yun , Niranjan Sunil Mudakatte , Mario Francisco Velez , Chengjie Zuo , Jonghae Kim
IPC: H01L23/48 , H05K1/11 , H05K3/40 , H05K3/30 , H05K1/03 , H05K1/18 , H01F27/28 , H05K3/06 , H03H7/01 , H03H7/46 , H01L49/02 , H01L23/66 , H01Q1/48 , H01Q1/36 , H01Q1/38 , H01Q1/24
CPC classification number: H05K1/181 , H01F27/2804 , H01L23/49822 , H01L23/5225 , H01L23/5227 , H01L23/552 , H01L23/645 , H01L23/66 , H01L24/06 , H01L28/10 , H01L2223/6672 , H01L2223/6677 , H01L2224/16225 , H01Q1/241 , H01Q1/36 , H01Q1/38 , H01Q1/48 , H03H7/0115 , H03H7/0138 , H03H7/46 , H05K1/0224 , H05K1/0271 , H05K1/144 , H05K3/06 , H05K3/303 , H05K2201/041 , H05K2201/045 , H05K2201/0715 , H05K2201/09136 , H05K2201/1003 , H05K2201/10378 , H05K2201/10674
Abstract: An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.
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