公开(公告)号：US09553200B2

公开(公告)日：2017-01-24

申请号：US13777119

申请日：2013-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Sachiaki Tezuka ,  Shinji Ohno

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02631 ,  H01L29/04 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603

Abstract: An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer is formed to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween, a first insulating layer is formed to cover the gate insulating layer and the gate electrode layer, an impurity element is introduced through the insulating layer to form a pair of impurity regions in the oxide semiconductor layer, a second insulating layer is formed over the first insulating layer, the first insulating layer and the second insulating layer are anisotropically etched to form a sidewall insulating layer in contact with a side surface of the gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the pair of impurity regions are formed.

Abstract translation: 形成氧化物半导体层，在氧化物半导体层上形成栅极绝缘层，形成栅极层与氧化物半导体层重叠，栅极绝缘层插入其间，形成第一绝缘层以覆盖栅极 绝缘层和栅电极层，通过绝缘层引入杂质元素，以在氧化物半导体层中形成一对杂质区，在第一绝缘层，第一绝缘层和第二绝缘层上形成第二绝缘层 各层各向异性地蚀刻以形成与栅电极层的侧表面接触的侧壁绝缘层，并且形成与一对杂质区接触的源电极层和漏电极层。

公开(公告)号：US09496375B2

公开(公告)日：2016-11-15

申请号：US14831972

申请日：2015-08-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Atsuo Isobe ,  Kunio Hosoya

IPC: H01L21/336 ,  H01L29/66 ,  H01L21/02 ,  H01L21/441 ,  H01L29/51 ,  H01L29/417 ,  H01L29/786 ,  H01L27/12 ,  H01L21/383 ,  H01L21/425 ,  H01L21/4757 ,  H01L29/24 ,  H01L29/49 ,  H01L27/108 ,  H01L27/11 ,  H01L27/115

CPC classification number: H01L29/66969 ,  H01L21/02178 ,  H01L21/02244 ,  H01L21/0237 ,  H01L21/02565 ,  H01L21/383 ,  H01L21/425 ,  H01L21/441 ,  H01L21/47573 ,  H01L27/10873 ,  H01L27/1108 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/517 ,  H01L29/7869

Abstract: To improve productivity of a transistor that includes an oxide semiconductor and has good electrical characteristics. In a top-gate transistor including a gate insulating film and a gate electrode over an oxide semiconductor film, a metal film is formed over the oxide semiconductor film, oxygen is added to the metal film to form a metal oxide film, and the metal oxide film is used as a gate insulating film. After an oxide insulating film is formed over the oxide semiconductor film, a metal film may be formed over the oxide insulating film. Oxygen is added to the metal film to form a metal oxide film and added also to the oxide semiconductor film or the oxide insulating film.

公开(公告)号：US09269798B2

公开(公告)日：2016-02-23

申请号：US14736808

申请日：2015-06-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takehisa Hatano ,  Sachiaki Tezuka ,  Atsuo Isobe

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/66 ,  H01L29/786 ,  H01L21/467 ,  H01L21/033

CPC classification number: H01L29/66969 ,  H01L21/0334 ,  H01L21/467 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/7869

Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.

Abstract translation: 提供了一种小型化并且保持有利的特性的半导体器件。 此外，小型半导体器件具有高产率。 半导体器件具有包括设置在具有绝缘表面的衬底上的氧化物半导体膜的结构; 源极电极层和漏电极层，其设置成与氧化物半导体膜的侧表面接触并且具有比氧化物半导体膜的厚度大的厚度; 设置在所述氧化物半导体膜，所述源极电极层和所述漏极电极层上的栅极绝缘膜; 以及设置在由氧化物半导体膜的顶表面和源电极层和漏电极层的顶表面之间的台阶形成的凹陷部中的栅电极层。

公开(公告)号：US09018629B2

公开(公告)日：2015-04-28

申请号：US13646084

申请日：2012-10-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Atsuo Isobe ,  Takehisa Hatano ,  Kazuya Hanaoka

IPC: H01L29/04 ,  H01L29/786 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/463 ,  H01L21/465 ,  H01L29/41733 ,  H01L29/41783 ,  H01L29/7869

Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.

Abstract translation: 提供具有高电特性的小型化晶体管。 形成作为源电极层和漏电极层的导电膜以覆盖氧化物半导体层和沟道保护层，然后形成与氧化物半导体层和沟道保护层重叠的导电膜的区域， 通过化学机械抛光处理除去。 在除去作为源极电极层和漏极电极层的导电膜的一部分的工序中，不进行使用抗蚀剂掩模的蚀刻工序，所以可以精确地进行精加工。 通过沟道保护层，可以抑制由于在导电膜上的化学机械抛光处理对氧化物半导体层的损坏或膜厚度的降低。

公开(公告)号：US08860021B2

公开(公告)日：2014-10-14

申请号：US13716909

申请日：2012-12-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Hiromichi Godo

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/78

CPC classification number: H01L29/0603 ,  H01L27/10879 ,  H01L27/1104 ,  H01L29/12 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/786 ,  H01L2029/7858

Abstract: A structure including an oxide semiconductor layer which is provided over an insulating surface and includes a channel formation region and a pair of low-resistance regions between which the channel formation region is positioned, a gate insulating film covering a top surface and a side surface of the oxide semiconductor layer, a gate electrode covering a top surface and a side surface of the channel formation region with the gate insulating film positioned therebetween, and electrodes electrically connected to the low-resistance regions is employed. The electrodes are electrically connected to at least side surfaces of the low-resistance regions, so that contact resistance with the source electrode and the drain electrode is reduced.

Abstract translation: 一种包括氧化物半导体层的结构，其设置在绝缘表面上并且包括沟道形成区域和一对低电阻区域，沟道形成区域位于其间，覆盖顶表面和侧表面的栅极绝缘膜 所述氧化物半导体层，覆盖所述沟道形成区域的顶表面的栅电极和位于其间的所述栅极绝缘膜的栅电极，以及电连接到所述低电阻区域的电极。 电极电连接到低电阻区域的至少侧面，从而降低与源电极和漏电极的接触电阻。

公开(公告)号：US20130203214A1

公开(公告)日：2013-08-08

申请号：US13755862

申请日：2013-01-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Atsuo Isobe ,  Kunio Hosoya

IPC: H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02178 ,  H01L21/02244 ,  H01L21/0237 ,  H01L21/02565 ,  H01L21/383 ,  H01L21/425 ,  H01L21/441 ,  H01L21/47573 ,  H01L27/10873 ,  H01L27/1108 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/517 ,  H01L29/7869

Abstract: To improve productivity of a transistor that includes an oxide semiconductor and has good electrical characteristics. In a top-gate transistor including a gate insulating film and a gate electrode over an oxide semiconductor film, a metal film is formed over the oxide semiconductor film, oxygen is added to the metal film to form a metal oxide film, and the metal oxide film is used as a gate insulating film. After an oxide insulating film is formed over the oxide semiconductor film, a metal film may be formed over the oxide insulating film. Oxygen is added to the metal film to form a metal oxide film and added also to the oxide semiconductor film or the oxide insulating film.

公开(公告)号：US09871059B2

公开(公告)日：2018-01-16

申请号：US14961061

申请日：2015-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe ,  Yutaka Okazaki ,  Kazuya Hanaoka ,  Shinya Sasagawa ,  Motomu Kurata

IPC: H01L29/10 ,  H01L29/24 ,  H01L27/12 ,  H01L27/11521 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786 ,  H01L27/108 ,  H01L27/11

CPC classification number: H01L27/1225 ,  H01L27/10879 ,  H01L27/1104 ,  H01L27/11521 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78 ,  H01L29/7869

Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.

公开(公告)号：US09773810B2

公开(公告)日：2017-09-26

申请号：US14816440

申请日：2015-08-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshinori Ieda ,  Atsuo Isobe ,  Yutaka Shionoiri ,  Tomoaki Atsumi

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/49 ,  H01L29/16 ,  H01L29/04 ,  H01L29/78 ,  H01L27/092 ,  H01L27/105 ,  H01L27/115 ,  H01L49/02 ,  H01L27/11551 ,  H01L27/1156

CPC classification number: H01L27/1207 ,  H01L27/092 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10805 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1259 ,  H01L28/40 ,  H01L29/04 ,  H01L29/16 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78 ,  H01L29/78648 ,  H01L29/7869

Abstract: Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

公开(公告)号：US09666720B2

公开(公告)日：2017-05-30

申请号：US14269819

申请日：2014-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US09570593B2

公开(公告)日：2017-02-14

申请号：US14706304

申请日：2015-05-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsuo Isobe

IPC: H01L21/70 ,  H01L27/108 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L21/70 ,  H01L27/1085 ,  H01L27/1259 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in S value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes. Specifically, a first gate insulating film is provided to cover a first gate electrode, an oxide semiconductor film is provided to be in contact with the first gate insulating film and extend beyond the first gate electrode, a second gate insulating film is provided to cover at least the oxide semiconductor film, and a second gate electrode is provided to be in contact with part of the second gate insulating film and extend beyond the first gate electrode.

Abstract translation: 防止包括氧化物半导体材料的鳍式晶体管的电特性的变化，例如阈值电压的负偏移或S值的增加。 氧化物半导体膜被夹在多个栅电极之间，其间具有设置在氧化物半导体膜和每个栅电极之间的绝缘膜。 具体地，设置第一栅极绝缘膜以覆盖第一栅电极，设置氧化物半导体膜以与第一栅极绝缘膜接触并且延伸超过第一栅电极，设置第二栅极绝缘膜以覆盖在 至少设置氧化物半导体膜，第二栅电极与第二栅极绝缘膜的一部分接触并且延伸超过第一栅电极。