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    DIE STRUCTURES AND METHODS OF FORMING THE SAME
    22.
    发明申请
    DIE STRUCTURES AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20250087555A1

    公开(公告)日：2025-03-13

    申请号：US18404431

    申请日：2024-01-04

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Kuo-Chiang Ting ,  Sung-Feng Yeh ,  Ta Hao Sung ,  Ken-Yu Chang

    IPC: H01L23/42 ,  H01L23/00 ,  H01L23/29 ,  H01L23/36 ,  H01L23/48 ,  H01L25/065

    Abstract: In an embodiment, a device includes: a lower integrated circuit die; an upper integrated circuit die bonded to the lower integrated circuit die with a dielectric-to-dielectric bonding region and with a metal-to-metal bonding region; a first buffer layer around the upper integrated circuit die, the first buffer layer including a buffer material having a first thermal conductivity, the buffer material having a columnar crystalline structure, the columnar crystalline structure including crystalline columns having a substantially uniform orientation in a direction that extends away from the lower integrated circuit die; and a gap-fill dielectric over the first buffer layer and around the upper integrated circuit die, the gap-fill dielectric having a second thermal conductivity, the first thermal conductivity greater than the second thermal conductivity.

    INTEGRATED CIRCUIT PACKAGE AND METHOD
    24.
    发明申请
    INTEGRATED CIRCUIT PACKAGE AND METHOD 有权

    公开(公告)号：US20240371822A1

    公开(公告)日：2024-11-07

    申请号：US18459171

    申请日：2023-08-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Sheng Lin ,  Chao-Wen Shih ,  Kuo-Chiang Ting ,  Yen-Ming Chen

    IPC: H01L23/00 ,  H01L21/66

    Abstract: A method includes: forming first semiconductor dies in a first wafer, each die of the first semiconductor dies comprising: first active devices over a front-side of a first semiconductor substrate; performing first probe tests on the first wafer; based on the first probe tests, classifying each die of the first semiconductor dies as a first good die, a first marginal die, or a first bad die; forming second semiconductor dies in a second wafer; performing second probe tests on the second wafer; based on the second probe tests, classifying each die of the second semiconductor dies as a second good die, a second marginal die, or a second bad die; and bonding the second wafer to the first wafer, each die of the first semiconductor dies aligning with a corresponding die of the second semiconductor dies.

    Photonic semiconductor device and method of manufacture
    29.
    发明授权
    Photonic semiconductor device and method of manufacture 有权

    公开(公告)号：US11592618B2

    公开(公告)日：2023-02-28

    申请号：US17226542

    申请日：2021-04-09

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Hsing-Kuo Hsia ,  Chen-Hua Yu ,  Kuo-Chiang Ting ,  Shang-Yun Hou

    IPC: G02B6/12 ,  G02B6/13 ,  G02B6/124

    Abstract: A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.

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