System and method for modulation mapping

    公开(公告)号:US09915700B2

    公开(公告)日:2018-03-13

    申请号:US14997460

    申请日:2016-01-15

    申请人: DCG Systems, Inc.

    发明人: Steven Kasapi

    摘要: Probing an integrated circuit (IC), by: electrically applying stimulation signal to said IC; scanning a selected area of said IC with a monochromatic beam; collecting beam reflection from the selected area of said IC, wherein the beam reflection correspond to modulation of the monochromatic beam by active devices of said IC; converting said beam reflection to an electrical probing signal; selecting a frequency or a band of frequencies of said probing signal; utilizing the probing signal to generate a spatial modulation map for various locations over the selected area of said IC; and displaying the spatial map on a monitor, wherein grey scale values correspond to modulation signal values.

    SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND SIGNAL TRANSMITTING/RECEIVING METHOD USING THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20170256602A1

    公开(公告)日:2017-09-07

    申请号:US15598475

    申请日:2017-05-18

    摘要: A semiconductor device includes a semiconductor substrate including a semiconductor chip formation region, a chip internal circuit provided within the semiconductor chip formation region of the semiconductor substrate, a signal transmitting/receiving unit which is provided within the semiconductor chip formation region of the semiconductor substrate, transmits/receives a signal to/from an outside in a non-contact manner by one of electromagnetic induction and capacitive coupling, and transmits/receives a signal to/from the chip internal circuit through electrical connection to the chip internal circuit, and a power receiving inductor which has a diameter provided along an outer edge of the semiconductor chip formation region of the semiconductor substrate so as to surround the chip internal circuit and the signal transmitting/receiving unit, receives a power supply signal from the outside in the non-contact manner, and is electrically connected to the chip internal circuit.

    Systems and methods for automatic test pattern generation for integrated circuit technologies

    公开(公告)号:US09726722B1

    公开(公告)日:2017-08-08

    申请号:US14284923

    申请日:2014-05-22

    发明人: Yosef Solt

    摘要: Systems and methods are provided for an integrated circuit system. A plurality of separate integrated circuit dies are coupled together to form an integrated circuit package, a first integrated circuit die including an input and a last integrated circuit die including an output, ones of the plurality of integrated circuit dies including a testing circuit associated with a corresponding integrated circuit die. The testing circuit includes a testing path for testing functionality of the corresponding integrated circuit die, a bypass path bypassing the testing path, and control circuitry for selecting between an output of the testing path and an output of the bypass path, the control circuitry being configured to select the output of the testing path or the output of the bypass path and to pass the selected output to a subsequent integrated circuit die among the plurality of coupled circuit dies.