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公开(公告)号:US09915700B2
公开(公告)日:2018-03-13
申请号:US14997460
申请日:2016-01-15
申请人: DCG Systems, Inc.
发明人: Steven Kasapi
IPC分类号: G01R31/308 , G01R31/302 , G01R31/311 , G01R31/28
CPC分类号: G01R31/311 , G01R31/2851 , G01R31/308
摘要: Probing an integrated circuit (IC), by: electrically applying stimulation signal to said IC; scanning a selected area of said IC with a monochromatic beam; collecting beam reflection from the selected area of said IC, wherein the beam reflection correspond to modulation of the monochromatic beam by active devices of said IC; converting said beam reflection to an electrical probing signal; selecting a frequency or a band of frequencies of said probing signal; utilizing the probing signal to generate a spatial modulation map for various locations over the selected area of said IC; and displaying the spatial map on a monitor, wherein grey scale values correspond to modulation signal values.
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公开(公告)号:US20180045775A1
公开(公告)日:2018-02-15
申请号:US15782962
申请日:2017-10-13
发明人: Alberto Pagani
IPC分类号: G01R31/28 , G01R31/302 , G01R31/303
CPC分类号: G01R31/2851 , G01R31/2886 , G01R31/3025 , G01R31/303 , H01L2924/0002 , H01L2924/00
摘要: An integrated circuit is fabricated on a semiconductor material die and adapted to be at least partly tested wirelessly. Circuitry for setting a selected radio communication frequency to be used for the wireless test of the integrated circuit is integrated on the semiconductor material die.
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公开(公告)号:US20180040591A1
公开(公告)日:2018-02-08
申请号:US15783710
申请日:2017-10-13
发明人: Alberto Pagani , Giovanni Girlando
IPC分类号: H01L25/065 , H01L29/82 , H01L23/48 , H01L23/522 , H01L23/64 , H01L23/66 , H01Q1/36 , H01L23/00 , H01Q1/38 , H01L25/10 , H01Q7/00 , H01L49/02 , H01Q1/22 , G01R1/073 , H01L25/16 , G01R31/302
CPC分类号: H01L25/0657 , G01R1/07314 , G01R31/3025 , H01L23/48 , H01L23/481 , H01L23/5227 , H01L23/645 , H01L23/66 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/105 , H01L25/16 , H01L28/10 , H01L29/82 , H01L2223/6616 , H01L2223/6677 , H01L2224/0401 , H01L2224/04042 , H01L2224/0557 , H01L2224/13025 , H01L2224/16 , H01L2224/16145 , H01L2224/16225 , H01L2224/29 , H01L2224/29199 , H01L2224/2929 , H01L2224/29299 , H01L2224/293 , H01L2224/29399 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06531 , H01L2225/06541 , H01L2225/06551 , H01L2225/06562 , H01L2225/06568 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01033 , H01L2924/01057 , H01L2924/01059 , H01L2924/14 , H01L2924/15311 , H01L2924/19042 , H01L2924/207 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01Q1/2283 , H01Q1/36 , H01Q1/38 , H01Q7/00 , H01L2924/00012 , H01L2924/00 , H01L2224/29099 , H01L2224/05552
摘要: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.
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公开(公告)号:US09829507B2
公开(公告)日:2017-11-28
申请号:US15045952
申请日:2016-02-17
发明人: Takashi Saito
CPC分类号: G01R1/0675 , G01R1/07342 , G01R27/08 , G01R31/2889 , H01L29/66174 , H01L29/93
摘要: Reliability of an electrical test of a semiconductor wafer is improved. A method of manufacturing a semiconductor device includes a step of performing an electrical test of a semiconductor element by allowing contact portions (tips) of a force terminal (contact terminal) and a sense terminal (contact terminal) held by a probe card (first card) to come into contact with an electrode terminal of a semiconductor wafer. In the step of performing the electrical test, the contact portions of the force terminal and the sense terminal move in a direction away from each other after coming into contact with the first electrode terminal.
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25.
公开(公告)号:US20170256602A1
公开(公告)日:2017-09-07
申请号:US15598475
申请日:2017-05-18
发明人: Yasutaka NAKASHIBA
IPC分类号: H01L49/02 , G01R31/28 , G01R31/303 , G01R31/302 , H02J17/00
CPC分类号: H01L28/10 , G01R31/2886 , G01R31/3025 , G01R31/303
摘要: A semiconductor device includes a semiconductor substrate including a semiconductor chip formation region, a chip internal circuit provided within the semiconductor chip formation region of the semiconductor substrate, a signal transmitting/receiving unit which is provided within the semiconductor chip formation region of the semiconductor substrate, transmits/receives a signal to/from an outside in a non-contact manner by one of electromagnetic induction and capacitive coupling, and transmits/receives a signal to/from the chip internal circuit through electrical connection to the chip internal circuit, and a power receiving inductor which has a diameter provided along an outer edge of the semiconductor chip formation region of the semiconductor substrate so as to surround the chip internal circuit and the signal transmitting/receiving unit, receives a power supply signal from the outside in the non-contact manner, and is electrically connected to the chip internal circuit.
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公开(公告)号:US20170242071A1
公开(公告)日:2017-08-24
申请号:US15589435
申请日:2017-05-08
发明人: Min-Jer WANG , Ching-Nen PENG , Chewn-Pu JOU , Feng Wei KUO , Hao CHEN , Hung-Chih LIN , Huan-Neng CHEN , Kuang-Kai YEN , Ming-Chieh LIU , Tsung-Hsiung LEE
IPC分类号: G01R31/302 , H01L25/065 , G01R31/28 , H02J50/20
CPC分类号: H02J50/40 , G01R31/2856 , G01R31/2884 , G01R31/2889 , G01R31/3025 , G06F17/5068 , H01L23/538 , H01L23/544 , H01L24/16 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L2223/54446 , H01L2224/14181 , H01L2224/16145 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/81193 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/06596 , H01L2924/15192 , H01L2924/15311 , H02J5/005 , H02J50/10 , H02J50/20 , H02J50/80 , H01L2224/81 , H01L2224/1403
摘要: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.
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公开(公告)号:US20170242062A1
公开(公告)日:2017-08-24
申请号:US15061231
申请日:2016-03-04
发明人: ALAN B. CORWIN , KEITH MULLINS , RONALD J. SCHOENBERG , C. MACGILL LYNDE , DAVID B. GOODSON , CHRISTOPHER A. WIKLOF
IPC分类号: G01R31/00 , G01R33/025 , G01R31/302 , G01R1/07
CPC分类号: G01R31/002 , G01R1/07 , G01R29/0878 , G01R31/2834 , G01R31/3025 , G01R31/311 , G01R33/0035 , G01R33/02 , G01R33/025 , G01R35/005
摘要: An automated circuit test system includes a magnetic sensor array configured to measure, at a plurality of locations, a magnetic field induced by a circuit under test. A circuit drive module can energize the circuit under test to induce the magnetic field. Optionally, the circuit drive module detects an electrical response from the circuit under test. Optionally, magnetic field data is combined with electrical response data prior to outputting the test result.
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28.
公开(公告)号:US09726722B1
公开(公告)日:2017-08-08
申请号:US14284923
申请日:2014-05-22
发明人: Yosef Solt
IPC分类号: G01R31/317 , G01R31/28 , G01R31/3185 , G01R31/302 , G01R31/3177
CPC分类号: G01R31/3177 , G01R31/3025 , G01R31/318513 , G01R31/318547 , G01R31/318555
摘要: Systems and methods are provided for an integrated circuit system. A plurality of separate integrated circuit dies are coupled together to form an integrated circuit package, a first integrated circuit die including an input and a last integrated circuit die including an output, ones of the plurality of integrated circuit dies including a testing circuit associated with a corresponding integrated circuit die. The testing circuit includes a testing path for testing functionality of the corresponding integrated circuit die, a bypass path bypassing the testing path, and control circuitry for selecting between an output of the testing path and an output of the bypass path, the control circuitry being configured to select the output of the testing path or the output of the bypass path and to pass the selected output to a subsequent integrated circuit die among the plurality of coupled circuit dies.
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公开(公告)号:US20170154948A1
公开(公告)日:2017-06-01
申请号:US15431877
申请日:2017-02-14
IPC分类号: H01L49/02 , H01L23/66 , H01L23/528 , G01R31/302 , H01L23/00 , H01L21/66 , G01R31/28 , H01L23/58 , H01L29/06
CPC分类号: H01L28/10 , G01R31/2834 , G01R31/2889 , G01R31/3025 , H01L22/32 , H01L22/34 , H01L23/528 , H01L23/544 , H01L23/564 , H01L23/585 , H01L23/66 , H01L24/05 , H01L25/0657 , H01L29/0642 , H01L2223/6677 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/16225 , H01L2224/48091 , H01L2224/48465 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: An integrated circuit on a substrate includes a peripheral portion that surrounds an active area and is positioned close to a scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations starting from the substrate and forms an integrated antenna. Another conductive structure extends in the peripheral portion on different planes of metallizations and forms a seal ring.
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公开(公告)号:US09645198B2
公开(公告)日:2017-05-09
申请号:US15159171
申请日:2016-05-19
发明人: Lee D. Whetsel
IPC分类号: G01R31/3177 , G01R31/28 , G01R31/302 , G01R31/3185 , G01R31/317
CPC分类号: G01R31/31713 , G01R31/2815 , G01R31/2851 , G01R31/2884 , G01R31/3025 , G01R31/31703 , G01R31/31725 , G01R31/31727 , G01R31/3177 , G01R31/318558
摘要: The disclosure describes a process and apparatus for accessing devices on a substrate. The substrate may include only full pin JTAG devices (504), only reduced pin JTAG devices (506), or a mixture of both full pin and reduced pin JTAG devices. The access is accomplished using a single interface (502) between the substrate (408) and a JTAG controller (404). The access interface may be a wired interface or a wireless interface and may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.
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