公开(公告)号：US20140191387A1

公开(公告)日：2014-07-10

申请号：US14177146

申请日：2014-02-10

Applicant: STMicroelectronics Pte Ltd. ,  STMicroelectronics Grenoble 2 SAS

Inventor： Yonggang JIN ,  Romain COFFY ,  Jerome TEYSSEYRE

IPC: H01L23/498 ,  H01L23/34

CPC classification number: H01L23/498 ,  H01L21/561 ,  H01L21/76283 ,  H01L21/76802 ,  H01L21/76838 ,  H01L23/3114 ,  H01L23/34 ,  H01L23/36 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  Y10T29/49124 ,  Y10T29/49174 ,  Y10T29/49204 ,  H01L2224/03 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A fan-out wafer level package is provided with a semiconductor die embedded in a reconstituted wafer. A redistribution layer is positioned over the semiconductor die, and includes a land grid array on a face of the package. A copper heat spreader is formed in the redistribution layer over the die in a same layer as a plurality of electrical traces configured to couple circuit pads of the semiconductor die to respective contact lands of the land grid array. In operation, the heat spreader improves efficiency of heat transfer from the die to the circuit board.

Abstract translation: 扇出晶片级封装设置有嵌入重构晶片中的半导体管芯。 再分配层位于半导体管芯上方，并且在封装的表面上包括焊盘栅格阵列。 铜管散热器形成在芯片上的再分配层中，与多个配置成将半导体管芯的电路焊盘耦合到焊盘栅极阵列的接触焊盘的多个电迹线相同的层中。 在操作中，散热器提高了从模具到电路板的热传递的效率。

公开(公告)号：US20240079363A1

公开(公告)日：2024-03-07

申请号：US18237489

申请日：2023-08-24

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Younes BOUTALEB

IPC: H01L23/00 ,  H01L23/051 ,  H01L23/31

CPC classification number: H01L24/16 ,  H01L23/051 ,  H01L23/3121 ,  H01L24/08 ,  H01L24/83 ,  H01L2224/08225 ,  H01L2224/16227 ,  H01L2224/81203 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01327 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: An integrated circuit package includes a support substrate and a cover fastened on a first face of the support substrate. The cover and support substrate define a housing containing an electronic integrated circuit chip having a first face equipped with electrically conductive protruding elements. A first space between the cover and a second face of the electronic integrated circuit chip is filled with a first shape memory material in the austenitic state. A second space between each pair of electrically conductive protruding elements and electrically conductive contact pads of the support substrate is filled with a second shape memory material in the austenitic state.

公开(公告)号：US20230403791A1

公开(公告)日：2023-12-14

申请号：US18205655

申请日：2023-06-05

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Younes BOUTALEB

IPC: H05K1/03 ,  H05K1/11 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K1/036 ,  H05K1/11 ,  H05K1/0209 ,  H05K3/4697 ,  H05K2201/10689 ,  H05K2201/10121

Abstract: An integrated-circuit package includes a flexible electrical-connection element sandwiched between a first face of a first multilayer support substrate and a second face of a second multilayer support substrate. The flexible electrical-connection element laterally projects with respect to, and is in electrical contact with at least one of, the multilayer support substrates. The flexible electrical-connection element and the first multilayer support substrate include, at a first region, respectively two first mutually facing orifices defining together a first cavity. The first cavity is at least partially closed off by a first part of the second face of the second multilayer support substrate. A first component is located in the first cavity, attached at the first part of the second face of the second multilayer support substrate and in electrical contact with the flexible electrical-connection element through the second multilayer support substrate.

公开(公告)号：US20230034445A1

公开(公告)日：2023-02-02

申请号：US17965443

申请日：2022-10-13

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Remi BRECHIGNAC ,  Jean-Michel RIVIERE

IPC: H01L33/52 ,  H01L31/0203 ,  H01L31/0216 ,  H01L33/44 ,  H01L33/62

Abstract: An electronic device includes a first electronic component and a second electronic. Each electronic component includes a carrier substrate having a back side and a front side, an electronic chip including an integrated optical element, an overmolded transparent block encapsulating the electronic chip above the carrier substrate, and electrical connections between the electronic chip and electrical contacts of the carrier substrate. An overmolded grid encapsulates and holds the first and second electronic components. The grid is configured so that sides of the first and second electronic components are at least partially exposed.

公开(公告)号：US20220392820A1

公开(公告)日：2022-12-08

申请号：US17833153

申请日：2022-06-06

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Younes BOUTALEB

IPC: H01L23/367 ,  H01L33/64 ,  H01L31/024 ,  H01L33/58 ,  H01L31/0232 ,  H01L33/62 ,  H01L31/02 ,  H01L23/00

Abstract: A cap is mounted to a support substrate, the cap including a cap body and an optical shutter. The cap and support substrate define a housing. An electronic chip is disposed in the housing above the support substrate. A face of the electronic chip supports an optical device that is optically coupled with the optical shutter. The cap body is thermally conductive. Within the housing, a thermally conductive linking structure is coupled in a thermally conductive manner between the cap body and the electronic chip. The thermally conductive linking structure surrounds the electronic chip. A thermal interface material fills a portion of the housing between the thermally conductive linking structure and the cap body.

公开(公告)号：US20220310869A1

公开(公告)日：2022-09-29

申请号：US17838929

申请日：2022-06-13

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Remi BRECHIGNAC ,  Jean-Michel RIVIERE

IPC: H01L31/16 ,  H01L23/00

Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated in a transparent block. An opaque conductive layer is applied to a top surface and a side surface of the transparent block. The receiver is mounted to the opaque conductive layer at the top surface. An electrical connection is made between the receiver and the opaque conductive layer. A conductive strip is also mounted to the side surface of the transparent block and isolated from the opaque conductive layer. A further electrical connection is made between the receiver and the conductive strip.

公开(公告)号：US20210398919A1

公开(公告)日：2021-12-23

申请号：US17466941

申请日：2021-09-03

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Denis FARISON ,  Romain COFFY ,  Jean-Michel RIVIERE

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/528 ,  H01L25/065

Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.

公开(公告)号：US20210202781A1

公开(公告)日：2021-07-01

申请号：US17199180

申请日：2021-03-11

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Alexandre COULLOMB ,  Romain COFFY ,  Jean-Michel RIVIERE

IPC: H01L31/16

Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.

公开(公告)号：US20210159985A1

公开(公告)日：2021-05-27

申请号：US17169010

申请日：2021-02-05

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Jean-Michel RIVIERE ,  Romain COFFY ,  Karine SAXOD

IPC: H04B10/40 ,  H05K7/02 ,  H05K5/03 ,  H04B10/80 ,  H01L31/16 ,  H01L31/0203

Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.

公开(公告)号：US20210135069A1

公开(公告)日：2021-05-06

申请号：US17071603

申请日：2020-10-15

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Remi BRECHIGNAC ,  Jean-Michel RIVIERE

IPC: H01L33/54 ,  H01L33/00

Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated within a first encapsulation layer, and the receiver is encapsulated within a second encapsulation layer. An opaque layer covers the first encapsulation layer (encapsulating the receiver) and covers the second encapsulation layer (encapsulating the emitter). The first and second encapsulation layers are separated by a region of opaque material. This opaque material may be provided by the opaque layer or an opaque fill.