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    SUBSTRATES AND METHODS OF MANUFACTURE
    41.
    发明申请
    SUBSTRATES AND METHODS OF MANUFACTURE 有权
    基板和制造方法

    公开(公告)号：US20160126174A1

    公开(公告)日：2016-05-05

    申请号：US14533728

    申请日：2014-11-05

    Applicant: Invensas Corporation

    Inventor： Hong Shen ,  Liang Wang ,  Gabriel Z. Guevara ,  Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Laura Wills Mirkarimi

    IPC: H01L23/498 ,  H01L21/48 ,  H01L25/00 ,  H01L25/065

    CPC classification number: H01L23/49822 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399

    Abstract: An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.

    Abstract translation: 插入器（110）在顶部和/或底部表面处具有用于连接到电路模块（例如IC 112）的接触焊盘。 插入器包括由多层（110.i）制成的衬底。 每个层可以是具有电路的衬底（110S），可能是陶瓷衬底。 基板垂直延伸。 在由对应于插入层的垂直层（310.i）制成的单个结构（310）中制造多个插入件。 沿着水平面（314）切割结构以提供插入件。 在切割之前和所有基板彼此附接之前，可以在基板表面上形成插入件的垂直导线（类似于贯穿基板通孔）。 因此，不需要对垂直导线进行贯通基板孔。 在基板彼此附接之前，也可以在基板表面上形成非垂直特征。 还提供了其他实施例。

    NON-CRYSTALLINE INORGANIC LIGHT EMITTING DIODE
    43.
    发明申请
    NON-CRYSTALLINE INORGANIC LIGHT EMITTING DIODE 有权
    非结晶无机发光二极管

    公开(公告)号：US20150129876A1

    公开(公告)日：2015-05-14

    申请号：US14605550

    申请日：2015-01-26

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Liang Wang

    IPC: H01L33/00 ,  H01L33/36 ,  H01L33/48 ,  H01L33/18 ,  H01L33/14

    CPC classification number: H01L33/0012 ,  H01L33/0095 ,  H01L33/14 ,  H01L33/16 ,  H01L33/18 ,  H01L33/36 ,  H01L33/486 ,  H01L2933/0016 ,  H01L2933/0033 ,  H05B33/14 ,  H05B33/22

    Abstract: Non-crystalline inorganic light emitting diode. In accordance with a first embodiment of the present invention, an article of manufacture includes a light emitting diode. The light emitting diode includes a non-crystalline inorganic light emission layer and first and second semiconducting non-crystalline inorganic charge transport layers surrounding the light emission layer. The light emission layer may be amorphous. The charge transport layers may be configured to inject one type of charge carrier and block the other type of charge carrier.

    Abstract translation: 非结晶无机发光二极管。 根据本发明的第一实施例，制品包括发光二极管。 发光二极管包括非结晶无机发光层和围绕发光层的第一和第二半导体非结晶无机电荷输送层。 发光层可以是无定形的。 电荷输送层可以被配置为注入一种类型的电荷载体并阻挡另一种类型的电荷载体。

    Non-crystalline inorganic light emitting diode
    44.
    发明授权
    Non-crystalline inorganic light emitting diode 有权
    非结晶无机发光二极管

    公开(公告)号：US08941111B2

    公开(公告)日：2015-01-27

    申请号：US13725923

    申请日：2012-12-21

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Liang Wang

    IPC: H01L33/16 ,  H01L33/18 ,  H05B33/14 ,  H05B33/22

    CPC classification number: H01L33/0012 ,  H01L33/0095 ,  H01L33/14 ,  H01L33/16 ,  H01L33/18 ,  H01L33/36 ,  H01L33/486 ,  H01L2933/0016 ,  H01L2933/0033 ,  H05B33/14 ,  H05B33/22

    Abstract: Non-crystalline inorganic light emitting diode. In accordance with a first embodiment of the present invention, an article of manufacture includes a light emitting diode. The light emitting diode includes a non-crystalline inorganic light emission layer and first and second semiconducting non-crystalline inorganic charge transport layers surrounding the light emission layer. The light emission layer may be amorphous. The charge transport layers may be configured to inject one type of charge carrier and block the other type of charge carrier.

    Abstract translation: 非结晶无机发光二极管。 根据本发明的第一实施例，制品包括发光二极管。 发光二极管包括非结晶无机发光层和围绕发光层的第一和第二半导体非结晶无机电荷输送层。 发光层可以是无定形的。 电荷输送层可以被配置为注入一种类型的电荷载体并阻挡另一种类型的电荷载体。

    PARALLEL PLATE SLOT EMISSION ARRAY
    45.
    发明申请
    PARALLEL PLATE SLOT EMISSION ARRAY 有权
    平行板槽排放阵列

    公开(公告)号：US20140045285A1

    公开(公告)日：2014-02-13

    申请号：US14058141

    申请日：2013-10-18

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Liang Wang ,  Steven D. Gottke

    IPC: H01L33/60

    CPC classification number: H01L33/60 ,  F21K9/23 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/156 ,  H01L33/62 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/19107 ,  H01L2933/0066

    Abstract: In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.

    Abstract translation: 根据本发明的实施例，制品包括被配置为从多于两个表面发射光的侧面发光发光二极管。 该制品包括电和热耦合到发光二极管的第一侧的第一片，以及电耦合到发光二极管的第二侧的第二片。 制品还包括多个反射表面，其被配置为通过第一片材中的孔反射来自发光二极管的所有表面的光。 光可以通过全内反射来反射。

    DIRECT-BONDED LED ARRAYS AND APPLICATIONS
    46.
    发明申请
    DIRECT-BONDED LED ARRAYS AND APPLICATIONS 有权

    公开(公告)号：US20210288037A1

    公开(公告)日：2021-09-16

    申请号：US17327169

    申请日：2021-05-21

    Applicant: Invensas Corporation

    Inventor： Min Tao ,  Liang Wang ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

    IPC: H01L25/16 ,  H01L33/00 ,  H01L25/10 ,  H01L27/12 ,  H01L27/15 ,  H01L25/18 ,  H01L21/321 ,  H01L21/02 ,  H01L23/00

    Abstract: Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

    High yield substrate assembly
    47.
    发明授权
    High yield substrate assembly 有权

    公开(公告)号：US10748858B2

    公开(公告)日：2020-08-18

    申请号：US16514104

    申请日：2019-07-17

    Applicant: Invensas Corporation

    Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

    IPC: H01L23/00 ,  H01L21/683 ,  H01L25/00 ,  H01L33/00 ,  H01L27/02 ,  H01L21/02 ,  H01L23/544

    Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

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